Loading arch/ppc64/kernel/head.S +11 −14 Original line number Diff line number Diff line Loading @@ -1556,20 +1556,17 @@ copy_to_here: .section ".text"; .align 2 ; .globl pmac_secondary_start_1 pmac_secondary_start_1: .globl __secondary_start_pmac_0 __secondary_start_pmac_0: /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ li r24,0 b 1f li r24,1 b .pmac_secondary_start .globl pmac_secondary_start_2 pmac_secondary_start_2: b 1f li r24,2 b .pmac_secondary_start .globl pmac_secondary_start_3 pmac_secondary_start_3: b 1f li r24,3 b .pmac_secondary_start 1: _GLOBAL(pmac_secondary_start) /* turn on 64-bit mode */ Loading arch/ppc64/kernel/pmac_smp.c +4 −17 Original line number Diff line number Diff line Loading @@ -59,9 +59,7 @@ #define DBG(fmt...) #endif extern void pmac_secondary_start_1(void); extern void pmac_secondary_start_2(void); extern void pmac_secondary_start_3(void); extern void __secondary_start_pmac_0(void); extern struct smp_ops_t *smp_ops; Loading Loading @@ -236,7 +234,7 @@ static int __init smp_core99_probe(void) static void __init smp_core99_kick_cpu(int nr) { int save_vector, j; unsigned int save_vector, j; unsigned long new_vector; unsigned long flags; volatile unsigned int *vector Loading @@ -253,20 +251,9 @@ static void __init smp_core99_kick_cpu(int nr) save_vector = *vector; /* Setup fake reset vector that does * b .pmac_secondary_start - KERNELBASE * b __secondary_start_pmac_0 + nr*8 - KERNELBASE */ switch(nr) { case 1: new_vector = (unsigned long)pmac_secondary_start_1; break; case 2: new_vector = (unsigned long)pmac_secondary_start_2; break; case 3: default: new_vector = (unsigned long)pmac_secondary_start_3; break; } new_vector = (unsigned long) __secondary_start_pmac_0 + nr * 8; *vector = 0x48000002 + (new_vector - KERNELBASE); /* flush data cache and inval instruction cache */ Loading Loading
arch/ppc64/kernel/head.S +11 −14 Original line number Diff line number Diff line Loading @@ -1556,20 +1556,17 @@ copy_to_here: .section ".text"; .align 2 ; .globl pmac_secondary_start_1 pmac_secondary_start_1: .globl __secondary_start_pmac_0 __secondary_start_pmac_0: /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ li r24,0 b 1f li r24,1 b .pmac_secondary_start .globl pmac_secondary_start_2 pmac_secondary_start_2: b 1f li r24,2 b .pmac_secondary_start .globl pmac_secondary_start_3 pmac_secondary_start_3: b 1f li r24,3 b .pmac_secondary_start 1: _GLOBAL(pmac_secondary_start) /* turn on 64-bit mode */ Loading
arch/ppc64/kernel/pmac_smp.c +4 −17 Original line number Diff line number Diff line Loading @@ -59,9 +59,7 @@ #define DBG(fmt...) #endif extern void pmac_secondary_start_1(void); extern void pmac_secondary_start_2(void); extern void pmac_secondary_start_3(void); extern void __secondary_start_pmac_0(void); extern struct smp_ops_t *smp_ops; Loading Loading @@ -236,7 +234,7 @@ static int __init smp_core99_probe(void) static void __init smp_core99_kick_cpu(int nr) { int save_vector, j; unsigned int save_vector, j; unsigned long new_vector; unsigned long flags; volatile unsigned int *vector Loading @@ -253,20 +251,9 @@ static void __init smp_core99_kick_cpu(int nr) save_vector = *vector; /* Setup fake reset vector that does * b .pmac_secondary_start - KERNELBASE * b __secondary_start_pmac_0 + nr*8 - KERNELBASE */ switch(nr) { case 1: new_vector = (unsigned long)pmac_secondary_start_1; break; case 2: new_vector = (unsigned long)pmac_secondary_start_2; break; case 3: default: new_vector = (unsigned long)pmac_secondary_start_3; break; } new_vector = (unsigned long) __secondary_start_pmac_0 + nr * 8; *vector = 0x48000002 + (new_vector - KERNELBASE); /* flush data cache and inval instruction cache */ Loading