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Commit eeaa334e authored by Siddartha Mohanadoss's avatar Siddartha Mohanadoss
Browse files

msm: ep_pcie: Update core initialization sequence 



On newer PHY version there is no need to adjust the DBI
address.

Change-Id: I23da953cf40b96e315e6d081051b1921741625c4
Signed-off-by: default avatarSiddartha Mohanadoss <smohanad@codeaurora.org>
parent 4731ea89

drivers/platform/msm/ep_pcie/ep_pcie_core.c

+8 −6
Original line number Diff line number Diff line
@@ -526,12 +526,14 @@ static void ep_pcie_core_init(struct ep_pcie_dev_t *dev, bool configured) 
		ep_pcie_write_reg(dev->parf, PCIE20_PARF_DEVICE_TYPE, 0x0);



		/* adjust DBI base address */

		if (dev->phy_rev < 6) {

			if (dev->dbi_base_reg)

				writel_relaxed(0x3FFFE000,

					dev->parf + dev->dbi_base_reg);

			else

				writel_relaxed(0x3FFFE000,

					dev->parf + PCIE20_PARF_DBI_BASE_ADDR);

		}



		/* Configure PCIe core to support 1GB aperture */

		if (dev->slv_space_reg)