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Commit ee4f1873 authored by Lingutla Chandrasekhar's avatar Lingutla Chandrasekhar
Browse files

ARM: dts: msm: Add llcc device tree support for SDM670 



SDM670 supports two instances of Last level cache controller
for total 512KB of system cache. Add device tree support for
these llcc instances to service SDM670 system cache clients
request for slices.
Also add dump size to allocate buffers for llcc cache dumps.

Change-Id: I23d9bc27cc1fe7fcbac222cb347cc1d9b87b7d10
Signed-off-by: default avatarLingutla Chandrasekhar <clingutla@codeaurora.org>
parent 9cecdb22

arch/arm64/boot/dts/qcom/sdm670.dtsi

+41 −0
Original line number Diff line number Diff line
@@ -595,6 +595,14 @@ 
			qcom,dump-node = <&L1_D_700>;

			qcom,dump-id = <0x87>;

		};

		qcom,llcc1_d_cache {

			qcom,dump-node = <&LLCC_1>;

			qcom,dump-id = <0x140>;

		};

		qcom,llcc2_d_cache {

			qcom,dump-node = <&LLCC_2>;

			qcom,dump-id = <0x141>;

		};

	};



	kryo3xx-erp {
@@ -639,6 +647,39 @@ 
		interrupts = <0 17 0>;

	};



	qcom,llcc@1100000 {

		compatible = "qcom,llcc-core", "syscon", "simple-mfd";

		reg = <0x1100000 0x250000>;

		reg-names = "llcc_base";

		qcom,llcc-banks-off = <0x0 0x80000 >;

		qcom,llcc-broadcast-off = <0x200000>;



		llcc: qcom,sdm670-llcc {

			compatible = "qcom,sdm670-llcc";

			#cache-cells = <1>;

			max-slices = <32>;

			qcom,dump-size = <0x80000>;

		};



		qcom,llcc-erp {

			compatible = "qcom,llcc-erp";

			interrupt-names = "ecc_irq";

			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;

		};



		qcom,llcc-amon {

			compatible = "qcom,llcc-amon";

		};



		LLCC_1: llcc_1_dcache {

			qcom,dump-size = <0xd8000>;

		};



		LLCC_2: llcc_2_dcache {

			qcom,dump-size = <0xd8000>;

		};

	};



	dcc: dcc_v2@10a2000 {

		compatible = "qcom,dcc_v2";

		reg = <0x10a2000 0x1000>,