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Commit ee4b6faf authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
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drm/i915: Modify reset func to handle per engine resets 



In full gpu reset we prime all engines and reset domains corresponding to
each engine. Per engine reset is just a special case of this process
wherein only a single engine is reset. This change is aimed to modify
relevant functions to achieve this. There are some other steps we carry out
in case of engine reset which are addressed in later patches.

Reset func now accepts a mask of all engines that need to be reset. Where
per engine resets are supported, error handler populates the mask
accordingly otherwise all engines are specified.

v2: ALL_ENGINES mask fixup, better for_each_ring_masked (Chris)
v3: Whitespace fixes (Chris)
v4: Rebase due to s/ring/engine

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarArun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458143640-20563-1-git-send-email-mika.kuoppala@intel.com
parent 72341af4

drivers/gpu/drm/i915/i915_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -881,7 +881,7 @@ int i915_reset(struct drm_device *dev) 


	simulated = dev_priv->gpu_error.stop_rings != 0;



	ret = intel_gpu_reset(dev);

	ret = intel_gpu_reset(dev, ALL_ENGINES);



	/* Also reset the gpu hangman. */

	if (simulated) {

drivers/gpu/drm/i915/i915_drv.h

+7 −1
Original line number Diff line number Diff line
@@ -1988,6 +1988,10 @@ static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc) 
	for ((i__) = 0; (i__) < I915_NUM_ENGINES; (i__)++) \

		for_each_if ((((ring__) = &(dev_priv__)->engine[(i__)]), intel_engine_initialized((ring__))))



#define for_each_engine_masked(engine__, dev_priv__, mask__) \

	for ((engine__) = &dev_priv->engine[0]; (engine__) < &dev_priv->engine[I915_NUM_ENGINES]; (engine__)++) \

		for_each_if (intel_engine_flag((engine__)) & (mask__) && intel_engine_initialized((engine__)))



enum hdmi_force_audio {

	HDMI_AUDIO_OFF_DVI = -2,	/* no aux data for HDMI-DVI converter */

	HDMI_AUDIO_OFF,			/* force turn off HDMI audio */
@@ -2570,6 +2574,8 @@ struct drm_i915_cmd_table { 
#define BLT_RING		(1<<BCS)

#define VEBOX_RING		(1<<VECS)

#define BSD2_RING		(1<<VCS2)

#define ALL_ENGINES		(~0)



#define HAS_BSD(dev)		(INTEL_INFO(dev)->ring_mask & BSD_RING)

#define HAS_BSD2(dev)		(INTEL_INFO(dev)->ring_mask & BSD2_RING)

#define HAS_BLT(dev)		(INTEL_INFO(dev)->ring_mask & BLT_RING)
@@ -2698,7 +2704,7 @@ extern void i915_driver_postclose(struct drm_device *dev, 
extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,

			      unsigned long arg);

#endif

extern int intel_gpu_reset(struct drm_device *dev);

extern int intel_gpu_reset(struct drm_device *dev, u32 engine_mask);

extern bool intel_has_gpu_reset(struct drm_device *dev);

extern int i915_reset(struct drm_device *dev);

extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);

drivers/gpu/drm/i915/i915_gem.c

+7 −7
Original line number Diff line number Diff line
@@ -5018,7 +5018,7 @@ i915_gem_cleanup_engines(struct drm_device *dev) 
		 * expects the system to be in execlists mode on startup,

		 * so we need to reset the GPU back to legacy mode.

		 */

            intel_gpu_reset(dev);

		intel_gpu_reset(dev, ALL_ENGINES);

}



static void

drivers/gpu/drm/i915/i915_gem_context.c

+1 −1
Original line number Diff line number Diff line
@@ -413,7 +413,7 @@ void i915_gem_context_fini(struct drm_device *dev) 
		/* The only known way to stop the gpu from accessing the hw context is

		 * to reset it. Do this as the very last operation to avoid confusing

		 * other code, leading to spurious errors. */

		intel_gpu_reset(dev);

		intel_gpu_reset(dev, ALL_ENGINES);



		/* When default context is created and switched to, base object refcount

		 * will be 2 (+1 from object creation and +1 from do_switch()).

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -164,6 +164,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) 
#define  GEN6_GRDOM_RENDER		(1 << 1)

#define  GEN6_GRDOM_MEDIA		(1 << 2)

#define  GEN6_GRDOM_BLT			(1 << 3)

#define  GEN6_GRDOM_VECS		(1 << 4)

#define  GEN8_GRDOM_MEDIA2		(1 << 7)



#define RING_PP_DIR_BASE(ring)		_MMIO((ring)->mmio_base+0x228)

#define RING_PP_DIR_BASE_READ(ring)	_MMIO((ring)->mmio_base+0x518)