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Commit edad0c23 authored by David Engraf's avatar David Engraf Committed by Greg Kroah-Hartman
Browse files

tty/serial: atmel: fix out of range clock divider handling 



[ Upstream commit cb47b9f8630ae3fa3f5fbd0c7003faba7abdf711 ]

Use MCK_DIV8 when the clock divider is > 65535. Unfortunately the mode
register was already written thus the clock selection is ignored.

Fix by doing the baud rate calulation before setting the mode.

Fixes: 5bf5635a ("tty/serial: atmel: add fractional baud rate support")
Signed-off-by: default avatarDavid Engraf <david.engraf@sysgo.com>
Acked-by: default avatarLudovic Desroches <ludovic.desroches@microchip.com>
Acked-by: default avatarRichard Genoud <richard.genoud@gmail.com>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20191216085403.17050-1-david.engraf@sysgo.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 190d14f3

drivers/tty/serial/atmel_serial.c

+22 −21
Original line number Diff line number Diff line
@@ -2200,27 +2200,6 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, 
		mode |= ATMEL_US_USMODE_NORMAL;

	}



	/* set the mode, clock divisor, parity, stop bits and data size */

	atmel_uart_writel(port, ATMEL_US_MR, mode);



	/*

	 * when switching the mode, set the RTS line state according to the

	 * new mode, otherwise keep the former state

	 */

	if ((old_mode & ATMEL_US_USMODE) != (mode & ATMEL_US_USMODE)) {

		unsigned int rts_state;



		if ((mode & ATMEL_US_USMODE) == ATMEL_US_USMODE_HWHS) {

			/* let the hardware control the RTS line */

			rts_state = ATMEL_US_RTSDIS;

		} else {

			/* force RTS line to low level */

			rts_state = ATMEL_US_RTSEN;

		}



		atmel_uart_writel(port, ATMEL_US_CR, rts_state);

	}



	/*

	 * Set the baud rate:

	 * Fractional baudrate allows to setup output frequency more
@@ -2247,6 +2226,28 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, 
	quot = cd | fp << ATMEL_US_FP_OFFSET;



	atmel_uart_writel(port, ATMEL_US_BRGR, quot);



	/* set the mode, clock divisor, parity, stop bits and data size */

	atmel_uart_writel(port, ATMEL_US_MR, mode);



	/*

	 * when switching the mode, set the RTS line state according to the

	 * new mode, otherwise keep the former state

	 */

	if ((old_mode & ATMEL_US_USMODE) != (mode & ATMEL_US_USMODE)) {

		unsigned int rts_state;



		if ((mode & ATMEL_US_USMODE) == ATMEL_US_USMODE_HWHS) {

			/* let the hardware control the RTS line */

			rts_state = ATMEL_US_RTSDIS;

		} else {

			/* force RTS line to low level */

			rts_state = ATMEL_US_RTSEN;

		}



		atmel_uart_writel(port, ATMEL_US_CR, rts_state);

	}



	atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);

	atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN | ATMEL_US_RXEN);