Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +14 −16 Original line number Diff line number Diff line Loading @@ -1373,6 +1373,11 @@ int dsi_pre_clkoff_cb(void *priv, if (rc) pr_err("%s: Failed to enable dsi clamps. rc=%d\n", __func__, rc); rc = dsi_display_phy_reset_config(display, false); if (rc) pr_err("%s: Failed to reset phy, rc=%d\n", __func__, rc); } else { /* Make sure that controller is not in ULPS state when * the DSI link is not active. Loading Loading @@ -1428,6 +1433,13 @@ int dsi_post_clkon_cb(void *priv, } } rc = dsi_display_phy_reset_config(display, true); if (rc) { pr_err("%s: Failed to reset phy, rc=%d\n", __func__, rc); goto error; } rc = dsi_display_set_clamp(display, false); if (rc) { pr_err("%s: Failed to disable dsi clamps. rc=%d\n", Loading Loading @@ -2973,18 +2985,11 @@ int dsi_display_prepare(struct dsi_display *display) goto error_phy_disable; } rc = dsi_display_phy_reset_config(display, true); if (rc) { pr_err("[%s] failed to setup DSI controller, rc=%d\n", display->name, rc); goto error_ctrl_deinit; } rc = dsi_display_set_clk_src(display); if (rc) { pr_err("[%s] failed to set DSI link clock source, rc=%d\n", display->name, rc); goto error_phy_reset_off; goto error_ctrl_deinit; } rc = dsi_display_clk_ctrl(display->dsi_clk_handle, Loading @@ -2992,7 +2997,7 @@ int dsi_display_prepare(struct dsi_display *display) if (rc) { pr_err("[%s] failed to enable DSI link clocks, rc=%d\n", display->name, rc); goto error_phy_reset_off; goto error_ctrl_deinit; } rc = dsi_display_ctrl_host_enable(display); Loading @@ -3015,8 +3020,6 @@ int dsi_display_prepare(struct dsi_display *display) error_ctrl_link_off: (void)dsi_display_clk_ctrl(display->dsi_clk_handle, DSI_LINK_CLK, DSI_CLK_OFF); error_phy_reset_off: (void)dsi_display_phy_reset_config(display, false); error_ctrl_deinit: (void)dsi_display_ctrl_deinit(display); error_phy_disable: Loading Loading @@ -3233,11 +3236,6 @@ int dsi_display_unprepare(struct dsi_display *display) pr_err("[%s] failed to disable DSI PHY, rc=%d\n", display->name, rc); rc = dsi_display_phy_reset_config(display, false); if (rc) pr_err("[%s] failed to disable DSI PHY reset config, rc=%d\n", display->name, rc); rc = dsi_display_clk_ctrl(display->dsi_clk_handle, DSI_CORE_CLK, DSI_CLK_OFF); if (rc) Loading drivers/gpu/drm/msm/dsi-staging/dsi_hw.h +1 −1 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ readl_relaxed((dsi_hw)->disp_cc_base + (off)) #define DSI_DISP_CC_W32(dsi_hw, off, val) \ do {\ pr_err("[DSI_%d][%s] - [0x%08x]\n", \ pr_debug("[DSI_%d][%s] - [0x%08x]\n", \ (dsi_hw)->index, #off, val); \ writel_relaxed((val), (dsi_hw)->disp_cc_base + (off)); \ } while (0) Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +14 −16 Original line number Diff line number Diff line Loading @@ -1373,6 +1373,11 @@ int dsi_pre_clkoff_cb(void *priv, if (rc) pr_err("%s: Failed to enable dsi clamps. rc=%d\n", __func__, rc); rc = dsi_display_phy_reset_config(display, false); if (rc) pr_err("%s: Failed to reset phy, rc=%d\n", __func__, rc); } else { /* Make sure that controller is not in ULPS state when * the DSI link is not active. Loading Loading @@ -1428,6 +1433,13 @@ int dsi_post_clkon_cb(void *priv, } } rc = dsi_display_phy_reset_config(display, true); if (rc) { pr_err("%s: Failed to reset phy, rc=%d\n", __func__, rc); goto error; } rc = dsi_display_set_clamp(display, false); if (rc) { pr_err("%s: Failed to disable dsi clamps. rc=%d\n", Loading Loading @@ -2973,18 +2985,11 @@ int dsi_display_prepare(struct dsi_display *display) goto error_phy_disable; } rc = dsi_display_phy_reset_config(display, true); if (rc) { pr_err("[%s] failed to setup DSI controller, rc=%d\n", display->name, rc); goto error_ctrl_deinit; } rc = dsi_display_set_clk_src(display); if (rc) { pr_err("[%s] failed to set DSI link clock source, rc=%d\n", display->name, rc); goto error_phy_reset_off; goto error_ctrl_deinit; } rc = dsi_display_clk_ctrl(display->dsi_clk_handle, Loading @@ -2992,7 +2997,7 @@ int dsi_display_prepare(struct dsi_display *display) if (rc) { pr_err("[%s] failed to enable DSI link clocks, rc=%d\n", display->name, rc); goto error_phy_reset_off; goto error_ctrl_deinit; } rc = dsi_display_ctrl_host_enable(display); Loading @@ -3015,8 +3020,6 @@ int dsi_display_prepare(struct dsi_display *display) error_ctrl_link_off: (void)dsi_display_clk_ctrl(display->dsi_clk_handle, DSI_LINK_CLK, DSI_CLK_OFF); error_phy_reset_off: (void)dsi_display_phy_reset_config(display, false); error_ctrl_deinit: (void)dsi_display_ctrl_deinit(display); error_phy_disable: Loading Loading @@ -3233,11 +3236,6 @@ int dsi_display_unprepare(struct dsi_display *display) pr_err("[%s] failed to disable DSI PHY, rc=%d\n", display->name, rc); rc = dsi_display_phy_reset_config(display, false); if (rc) pr_err("[%s] failed to disable DSI PHY reset config, rc=%d\n", display->name, rc); rc = dsi_display_clk_ctrl(display->dsi_clk_handle, DSI_CORE_CLK, DSI_CLK_OFF); if (rc) Loading
drivers/gpu/drm/msm/dsi-staging/dsi_hw.h +1 −1 Original line number Diff line number Diff line Loading @@ -37,7 +37,7 @@ readl_relaxed((dsi_hw)->disp_cc_base + (off)) #define DSI_DISP_CC_W32(dsi_hw, off, val) \ do {\ pr_err("[DSI_%d][%s] - [0x%08x]\n", \ pr_debug("[DSI_%d][%s] - [0x%08x]\n", \ (dsi_hw)->index, #off, val); \ writel_relaxed((val), (dsi_hw)->disp_cc_base + (off)); \ } while (0) Loading