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Commit ed8d8aa1 authored by Mark Brown's avatar Mark Brown Committed by Kukjin Kim
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ARM: S3C64XX: Gate some more clocks by default



Gate the AC'97 and CF clocks by default. The drivers will enable them
required.

Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 2abf13c9
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+10 −10
Original line number Diff line number Diff line
@@ -201,6 +201,15 @@ static struct clk init_clocks_off[] = {
		.parent		= &clk_48m,
		.enable		= s3c64xx_sclk_ctrl,
		.ctrlbit	= S3C_CLKCON_SCLK_MMC2_48,
	}, {
		.name		= "ac97",
		.parent		= &clk_p,
		.ctrlbit	= S3C_CLKCON_PCLK_AC97,
	}, {
		.name		= "cfcon",
		.parent		= &clk_h,
		.enable		= s3c64xx_hclk_ctrl,
		.ctrlbit	= S3C_CLKCON_HCLK_IHOST,
	}, {
		.name		= "dma0",
		.parent		= &clk_h,
@@ -284,16 +293,7 @@ static struct clk init_clocks[] = {
		.name		= "watchdog",
		.parent		= &clk_p,
		.ctrlbit	= S3C_CLKCON_PCLK_WDT,
	}, {
		.name		= "ac97",
		.parent		= &clk_p,
		.ctrlbit	= S3C_CLKCON_PCLK_AC97,
	}, {
		.name		= "cfcon",
		.parent		= &clk_h,
		.enable		= s3c64xx_hclk_ctrl,
		.ctrlbit	= S3C_CLKCON_HCLK_IHOST,
	}
	},
};

static struct clk clk_hsmmc0 = {