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Commit ed3e2604 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
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sh-pfc: r8a7790: Don't use GPIO enum entries 



Refactor the GPIO macro magic to use GPIO numbers directly instead of
the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
entries from the mach/r8a7790.h header.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 728d53f4

drivers/pinctrl/sh-pfc/pfc-r8a7790.c

+60 −30
Original line number Diff line number Diff line
@@ -24,39 +24,69 @@ 
#include <linux/kernel.h>

#include <linux/platform_data/gpio-rcar.h>



#include <mach/r8a7790.h>



#include "core.h"

#include "sh_pfc.h"



#define CPU_32_PORT(fn, pfx, sfx)				\

	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\

	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),	\

	PORT_1(fn, pfx##31, sfx)



#define CPU_32_PORT1(fn, pfx, sfx)				\

	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\

	PORT_10(fn, pfx##2, sfx)



#define CPU_32_PORT2(fn, pfx, sfx)				\

	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\

	PORT_10(fn, pfx##2, sfx)



/* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */

#define CPU_ALL_PORT(fn, pfx, sfx)				\

	CPU_32_PORT(fn, pfx##_0_, sfx),				\

	CPU_32_PORT1(fn, pfx##_1_, sfx),			\

	CPU_32_PORT2(fn, pfx##_2_, sfx),			\

	CPU_32_PORT(fn, pfx##_3_, sfx),				\

	CPU_32_PORT(fn, pfx##_4_, sfx),				\

	CPU_32_PORT(fn, pfx##_5_, sfx)				\



#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)

#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN)



#define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str)

#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused)

#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused)

#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)



#define PORT_GP_32(bank, fn, sfx)					\

	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\

	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\

	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\

	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\

	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\

	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\

	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\

	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\

	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\

	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\

	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\

	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\

	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\

	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\

	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\

	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)



#define PORT_GP_32_REV(bank, fn, sfx)					\

	PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),	\

	PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),	\

	PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),	\

	PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),	\

	PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),	\

	PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),	\

	PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),	\

	PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),	\

	PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),	\

	PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),	\

	PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),	\

	PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),	\

	PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),	\

	PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),	\

	PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),	\

	PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)



#define CPU_ALL_PORT(fn, sfx)						\

	PORT_GP_32(0, fn, sfx),						\

	PORT_GP_32(1, fn, sfx),						\

	PORT_GP_32(2, fn, sfx),						\

	PORT_GP_32(3, fn, sfx),						\

	PORT_GP_32(4, fn, sfx),						\

	PORT_GP_32(5, fn, sfx)



#define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx



#define _GP_GPIO(bank, pin, _name, sfx)					\

	[(bank * 32) + pin] = {						\

		.name = __stringify(_name),				\

		.enum_id = _name##_DATA,				\

	}



#define _GP_DATA(bank, pin, name, sfx)					\

	PINMUX_DATA(name##_DATA, name##_FN)



#define GP_ALL(str)		CPU_ALL_PORT(_GP_PORT_ALL, str)

#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, unused)

#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, unused)



#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)

#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \