Merge "drm/msm/sde: reset bw/clk control after crtc disable" (ed07399e) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/msm/sde/sde_core_perf.c

+18 −3

Original line number	Diff line number	Diff line
		@@ -104,13 +104,14 @@ static bool _sde_core_video_mode_intf_connected(struct drm_crtc *crtc)
		return intf_connected;
		}

		static void _sde_core_perf_calc_crtc(struct drm_crtc *crtc,
		static void _sde_core_perf_calc_crtc(struct sde_kms *kms,
		struct drm_crtc *crtc,
		struct drm_crtc_state *state,
		struct sde_core_perf_params *perf)
		{
		struct sde_crtc_state *sde_cstate;

		if (!crtc \|\| !state \|\| !perf) {
		if (!kms \|\| !kms->catalog \|\| !crtc \|\| !state \|\| !perf) {
		SDE_ERROR("invalid parameters\n");
		return;
		}
		@@ -124,6 +125,20 @@ static void _sde_core_perf_calc_crtc(struct drm_crtc *crtc,
		perf->core_clk_rate =
		sde_crtc_get_property(sde_cstate, CRTC_PROP_CORE_CLK);

		if (!sde_cstate->bw_control) {
		perf->bw_ctl = kms->catalog->perf.max_bw_high * 1000ULL;
		perf->max_per_pipe_ib = perf->bw_ctl;
		perf->core_clk_rate = kms->perf.max_core_clk_rate;
		} else if (kms->perf.perf_tune.mode == SDE_PERF_MODE_MINIMUM) {
		perf->bw_ctl = 0;
		perf->max_per_pipe_ib = 0;
		perf->core_clk_rate = 0;
		} else if (kms->perf.perf_tune.mode == SDE_PERF_MODE_FIXED) {
		perf->bw_ctl = kms->perf.fix_core_ab_vote;
		perf->max_per_pipe_ib = kms->perf.fix_core_ib_vote;
		perf->core_clk_rate = kms->perf.fix_core_clk_rate;
		}

		SDE_DEBUG("crtc=%d clk_rate=%llu ib=%llu ab=%llu\n",
		crtc->base.id, perf->core_clk_rate,
		perf->max_per_pipe_ib, perf->bw_ctl);
		@@ -159,7 +174,7 @@ int sde_core_perf_crtc_check(struct drm_crtc *crtc,

		/* swap state and obtain new values */
		sde_cstate->cur_perf = sde_cstate->new_perf;
		_sde_core_perf_calc_crtc(crtc, state, &sde_cstate->new_perf);
		_sde_core_perf_calc_crtc(kms, crtc, state, &sde_cstate->new_perf);

		bw_sum_of_intfs = sde_cstate->new_perf.bw_ctl;
		curr_client_type = sde_crtc_get_client_type(crtc);

drivers/gpu/drm/msm/sde/sde_crtc.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -2453,6 +2453,9 @@ static void sde_crtc_disable(struct drm_crtc *crtc)
		memset(sde_crtc->mixers, 0, sizeof(sde_crtc->mixers));
		sde_crtc->num_mixers = 0;

		/* disable clk & bw control until clk & bw properties are set */
		cstate->bw_control = false;

		spin_lock_irqsave(&sde_crtc->spin_lock, flags);
		list_for_each_entry(node, &sde_crtc->user_event_list, list) {
		ret = 0;
		@@ -3063,6 +3066,7 @@ static int sde_crtc_atomic_set_property(struct drm_crtc *crtc,
		case CRTC_PROP_ROI_V1:
		ret = _sde_crtc_set_roi_v1(state, (void *)val);
		break;
		case CRTC_PROP_CORE_CLK:
		case CRTC_PROP_CORE_AB:
		case CRTC_PROP_CORE_IB:
		case CRTC_PROP_MEM_AB:

drivers/gpu/drm/msm/sde/sde_crtc.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -255,7 +255,7 @@ struct sde_crtc_respool {
		* @intf_mode : Interface mode of the primary connector
		* @rsc_client : sde rsc client when mode is valid
		* @is_ppsplit : Whether current topology requires PPSplit special handling
		* @bw_control : true if bw controlled by bw properties
		* @bw_control : true if bw/clk controlled by bw/clk properties
		* @crtc_roi : Current CRTC ROI. Possibly sub-rectangle of mode.
		* Origin top left of CRTC.
		* @lm_bounds : LM boundaries based on current mode full resolution, no ROI.