Commit ece4a17d authored Aug 07, 2014 by Jiri Kosina Committed by Daniel Vetter Aug 08, 2014

drm/i915: read HEAD register back in init_ring_common() to enforce ordering

Withtout this, ring initialization fails reliabily during resume with

	[drm:init_ring_common] *ERROR* render ring initialization failed ctl 0001f001 head ffffff8804 tail 00000000 start 000e4000

This is not a complete fix, but it is verified to make the ring
initialization failures during resume much less likely.

We were not able to root-cause this bug (likely HW-specific to Gen4 chips)
yet. This is therefore used as a ducttape before problem is fully
understood and proper fix created, so that people don't suffer from
completely unusable systems in the meantime.

The discussion and debugging is happening at

	https://bugs.freedesktop.org/show_bug.cgi?id=76554



Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent ed3b6679

drivers/gpu/drm/i915/intel_ringbuffer.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -532,6 +532,9 @@ static int init_ring_common(struct intel_engine_cs *ring)
		else
		ring_setup_phys_status_page(ring);

		/* Enforce ordering by reading HEAD register back */
		I915_READ_HEAD(ring);

		/* Initialize the ring. This must happen _after_ we've cleared the ring
		* registers with the above sequence (the readback of the HEAD registers
		* also enforces ordering), otherwise the hw might lose the new ring