Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ec32bd9f authored by Heiko Stuebner's avatar Heiko Stuebner
Browse files

ARM: dts: rockchip: set correct dwc2 params for cortex-a9 socs 



According to the manual, the fifo sizes are the same as on later socs
like the rk3288 and this also fixes an error about "insufficient fifo
memory", as it seems the values read from the ip are wrong.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 13517157

arch/arm/boot/dts/rk3xxx.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -172,6 +172,11 @@ 
		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_OTG0>;

		clock-names = "otg";

		dr_mode = "otg";

		g-np-tx-fifo-size = <16>;

		g-rx-fifo-size = <275>;

		g-tx-fifo-size = <256 128 128 64 64 32>;

		g-use-dma;

		status = "disabled";

	};
@@ -181,6 +186,7 @@ 
		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_OTG1>;

		clock-names = "otg";

		dr_mode = "host";

		status = "disabled";

	};