Commit ec23108a authored Jan 24, 2018 by Blagovest Kolenichev

Merge android-4.9-o.78 (bf3b3398) into msm-4.9



* refs/heads/tmp-bf3b3398:
  Linux 4.9.78
  MIPS: AR7: ensure the port type's FCR value is used
  x86/retpoline: Optimize inline assembler for vmexit_fill_RSB
  x86/pti: Document fix wrong index
  kprobes/x86: Disable optimizing on the function jumps to indirect thunk
  kprobes/x86: Blacklist indirect thunk functions for kprobes
  retpoline: Introduce start/end markers of indirect thunk
  x86/mce: Make machine check speculation protected
  usbip: fix warning in vhci_hcd_probe/lockdep_init_map
  x86/cpu, x86/pti: Do not enable PTI on AMD processors
  arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls
  dm thin metadata: THIN_MAX_CONCURRENT_LOCKS should be 6
  dm btree: fix serious bug in btree_split_beneath()
  workqueue: avoid hard lockups in show_workqueue_state()
  libata: apply MAX_SEC_1024 to all LITEON EP1 series devices
  proc: fix coredump vs read /proc/*/stat race
  scripts/gdb/linux/tasks.py: fix get_thread_info
  can: peak: fix potential bug in packet fragmentation
  ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
  ARM: sunxi_defconfig: Enable CMA
  phy: work around 'phys' references to usb-nop-xceiv devices
  tracing: Fix converting enum's from the map in trace_event_eval_update()
  Input: twl4030-vibra - fix sibling-node lookup
  Input: twl6040-vibra - fix child-node lookup
  Input: 88pm860x-ts - fix child-node lookup
  Input: ALPS - fix multi-touch decoding on SS4 plus touchpads
  perf tools: Fix build with ARCH=x86_64
  x86/apic/vector: Fix off by one in error path
  pipe: avoid round_pipe_size() nr_pages overflow on 32-bit
  x86/tsc: Fix erroneous TSC rate on Skylake Xeon
  x86/mm/pkeys: Fix fill_sig_info_pkey
  module: Add retpoline tag to VERMAGIC
  x86/cpufeature: Move processor tracing out of scattered features
  objtool: Improve error message for bad file argument
  x86/retpoline: Add LFENCE to the retpoline/RSB filling RSB macros
  x86/retpoline: Fill RSB on context switch for affected CPUs
  sched/deadline: Zero out positive runtime after throttling constrained tasks
  scsi: hpsa: fix volume offline state
  iser-target: Fix possible use-after-free in connection establishment error
  af_key: fix buffer overread in parse_exthdrs()
  af_key: fix buffer overread in verify_address_len()
  timers: Unconditionally check deferrable base
  ALSA: hda - Apply the existing quirk to iMac 14,1
  ALSA: hda - Apply headphone noise quirk for another Dell XPS 13 variant
  ALSA: pcm: Remove yet superfluous WARN_ON()
  ALSA: seq: Make ioctls race-free
  futex: Prevent overflow by strengthen input validation
  scsi: sg: disable SET_FORCE_LOW_DMA
  libnvdimm, btt: Fix an incompatibility in the log layout
  FROMLIST: arm64: kpti: Fix the interaction between ASID switching and software PAN
  FROMLIST: arm64: Move post_ttbr_update_workaround to C code

Conflicts:
	arch/arm64/include/asm/efi.h
	arch/arm64/include/asm/mmu_context.h
	arch/arm64/mm/context.c
	drivers/scsi/sg.c
	kernel/workqueue.c

Change-Id: Icbdef53178fe3e325386cbae73edea918d23f519
Signed-off-by: Blagovest Kolenichev <bkolenichev@codeaurora.org>

parents eef0f772 bf3b3398

Documentation/x86/pti.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -78,7 +78,7 @@ this protection comes at a cost:
		non-PTI SYSCALL entry code, so requires mapping fewer
		things into the userspace page tables. The downside is
		that stacks must be switched at entry time.
		d. Global pages are disabled for all kernel structures not
		c. Global pages are disabled for all kernel structures not
		mapped into both kernel and userspace page tables. This
		feature of the MMU allows different processes to share TLB
		entries mapping the kernel. Losing the feature means more

Makefile

+1 −1

Original line number	Diff line number	Diff line
		VERSION = 4
		PATCHLEVEL = 9
		SUBLEVEL = 77
		SUBLEVEL = 78
		EXTRAVERSION =
		NAME = Roaring Lionus

arch/arm/boot/dts/kirkwood-openblocks_a7.dts

+8 −2

Original line number	Diff line number	Diff line
		@@ -53,7 +53,8 @@
		};

		pinctrl: pin-controller@10000 {
		pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
		pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header
		&pmx_gpio_header_gpo>;
		pinctrl-names = "default";

		pmx_uart0: pmx-uart0 {
		@@ -85,11 +86,16 @@
		* ground.
		*/
		pmx_gpio_header: pmx-gpio-header {
		marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",
		marvell,pins = "mpp17", "mpp29", "mpp28",
		"mpp35", "mpp34", "mpp40";
		marvell,function = "gpio";
		};

		pmx_gpio_header_gpo: pxm-gpio-header-gpo {
		marvell,pins = "mpp7";
		marvell,function = "gpo";
		};

		pmx_gpio_init: pmx-init {
		marvell,pins = "mpp38";
		marvell,function = "gpio";

arch/arm/configs/sunxi_defconfig

+2 −0

Original line number	Diff line number	Diff line
		@@ -11,6 +11,7 @@ CONFIG_SMP=y
		CONFIG_NR_CPUS=8
		CONFIG_AEABI=y
		CONFIG_HIGHMEM=y
		CONFIG_CMA=y
		CONFIG_ARM_APPENDED_DTB=y
		CONFIG_ARM_ATAG_DTB_COMPAT=y
		CONFIG_CPU_FREQ=y
		@@ -35,6 +36,7 @@ CONFIG_CAN_SUN4I=y
		# CONFIG_WIRELESS is not set
		CONFIG_DEVTMPFS=y
		CONFIG_DEVTMPFS_MOUNT=y
		CONFIG_DMA_CMA=y
		CONFIG_BLK_DEV_SD=y
		CONFIG_ATA=y
		CONFIG_AHCI_SUNXI=y

arch/arm64/include/asm/efi.h

+7 −5

Original line number	Diff line number	Diff line
		@@ -82,19 +82,21 @@ static inline void efi_set_pgd(struct mm_struct *mm)
		if (mm != current->active_mm) {
		/*
		* Update the current thread's saved ttbr0 since it is
		* restored as part of a return from exception. Set
		* the hardware TTBR0_EL1 using cpu_switch_mm()
		* directly to enable potential errata workarounds.
		* restored as part of a return from exception. Enable
		* access to the valid TTBR0_EL1 and invoke the errata
		* workaround directly since there is no return from
		* exception when invoking the EFI run-time services.
		*/
		update_saved_ttbr0(current, mm);
		cpu_switch_mm(mm->pgd, mm);
		uaccess_ttbr0_enable();
		post_ttbr_update_workaround();
		} else {
		/*
		* Defer the switch to the current thread's TTBR0_EL1
		* until uaccess_enable(). Restore the current
		* thread's saved ttbr0 corresponding to its active_mm
		*/
		cpu_set_reserved_ttbr0();
		uaccess_ttbr0_disable();
		update_saved_ttbr0(current, current->active_mm);
		}
		}