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Commit ebfba805 authored by Jyri Sarha's avatar Jyri Sarha Committed by Greg Kroah-Hartman
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drm/bridge: sii902x: pixel clock unit is 10kHz instead of 1kHz 



[ Upstream commit 8dbfc5b65023b67397aca28e8adb25c819f6398c ]

The pixel clock unit in the first two registers (0x00 and 0x01) of
sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by
10 fixes the issue.

Signed-off-by: default avatarJyri Sarha <jsarha@ti.com>
Reviewed-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1a2a8eae0b9d6333e7a5841026bf7fd65c9ccd09.1558964241.git.jsarha@ti.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 78921099

drivers/gpu/drm/bridge/sii902x.c

+3 −2
Original line number Diff line number Diff line
@@ -250,10 +250,11 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, 
	struct regmap *regmap = sii902x->regmap;

	u8 buf[HDMI_INFOFRAME_SIZE(AVI)];

	struct hdmi_avi_infoframe frame;

	u16 pixel_clock_10kHz = adj->clock / 10;

	int ret;



	buf[0] = adj->clock;

	buf[1] = adj->clock >> 8;

	buf[0] = pixel_clock_10kHz & 0xff;

	buf[1] = pixel_clock_10kHz >> 8;

	buf[2] = adj->vrefresh;

	buf[3] = 0x00;

	buf[4] = adj->hdisplay;