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Commit ebd88367 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

arm64: Remove __flush_dcache_page() 



This function is only used in __sync_icache_dcache(), so remove it and
call __flush_dcache_area() directly. The flush_icache_user_range()
function is not used in the arm64 kernel.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reported-by: default avatarWill Deacon <will.deacon@arm.com>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
parent 7249b79f

arch/arm64/include/asm/cacheflush.h

+0 −3
Original line number Diff line number Diff line
@@ -123,9 +123,6 @@ static inline void __flush_icache_all(void) 
#define flush_dcache_mmap_unlock(mapping) \

	spin_unlock_irq(&(mapping)->tree_lock)



#define flush_icache_user_range(vma,page,addr,len) \

	flush_dcache_page(page)



/*

 * We don't appear to need to do anything here.  In fact, if we did, we'd

 * duplicate cache flushing elsewhere performed by flush_dcache_page().

arch/arm64/mm/flush.c

+1 −6
Original line number Diff line number Diff line
@@ -70,11 +70,6 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page, 
#endif

}



void __flush_dcache_page(struct page *page)

{

	__flush_dcache_area(page_address(page), PAGE_SIZE);

}



void __sync_icache_dcache(pte_t pte, unsigned long addr)

{

	struct page *page = pte_page(pte);
@@ -84,7 +79,7 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr) 
		return;



	if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {

		__flush_dcache_page(page);

		__flush_dcache_area(page_address(page), PAGE_SIZE);

		__flush_icache_all();

	} else if (icache_is_aivivt()) {

		__flush_icache_all();

arch/arm64/mm/mm.h

+0 −1
Original line number Diff line number Diff line 
extern void __flush_dcache_page(struct page *page);

extern void __init bootmem_init(void);

extern void __init arm64_swiotlb_init(void);