Loading drivers/platform/msm/gsi/gsi.c +7 −2 Original line number Diff line number Diff line Loading @@ -2700,11 +2700,16 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size, } EXPORT_SYMBOL(gsi_configure_regs); int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size) int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size, enum gsi_ver ver) { void __iomem *gsi_base; uint32_t value; if (ver <= GSI_VER_ERR || ver >= GSI_VER_MAX) { GSIERR("Incorrect version %d\n", ver); return -GSI_STATUS_ERROR; } gsi_base = ioremap_nocache(gsi_base_addr, gsi_size); if (!gsi_base) { GSIERR("ioremap failed for 0x%pa\n", &gsi_base_addr); Loading @@ -2712,7 +2717,7 @@ int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size) } /* Enable the MCS and set to x2 clocks */ if (gsi_ctx->per.ver >= GSI_VER_1_2) { if (ver >= GSI_VER_1_2) { value = ((1 << GSI_GSI_MCS_CFG_MCS_ENABLE_SHFT) & GSI_GSI_MCS_CFG_MCS_ENABLE_BMSK); gsi_writel(value, gsi_base + GSI_GSI_MCS_CFG_OFFS); Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +2 −1 Original line number Diff line number Diff line Loading @@ -4046,7 +4046,8 @@ static int ipa3_trigger_fw_loading_mdms(void) } result = gsi_enable_fw(ipa3_res.transport_mem_base, ipa3_res.transport_mem_size); ipa3_res.transport_mem_size, ipa3_get_gsi_ver(ipa3_res.ipa_hw_type)); if (result) { IPAERR("Failed to enable GSI FW\n"); release_firmware(fw); Loading include/linux/msm_gsi.h +2 −1 Original line number Diff line number Diff line Loading @@ -1035,10 +1035,11 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size, * * @gsi_base_addr: Base address of GSI register space * @gsi_size: Mapping size of the GSI register space * @ver: GSI core version * @Return gsi_status */ int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size); int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size, enum gsi_ver ver); /** * gsi_get_inst_ram_offset_and_size - Peripheral should call this function Loading Loading
drivers/platform/msm/gsi/gsi.c +7 −2 Original line number Diff line number Diff line Loading @@ -2700,11 +2700,16 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size, } EXPORT_SYMBOL(gsi_configure_regs); int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size) int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size, enum gsi_ver ver) { void __iomem *gsi_base; uint32_t value; if (ver <= GSI_VER_ERR || ver >= GSI_VER_MAX) { GSIERR("Incorrect version %d\n", ver); return -GSI_STATUS_ERROR; } gsi_base = ioremap_nocache(gsi_base_addr, gsi_size); if (!gsi_base) { GSIERR("ioremap failed for 0x%pa\n", &gsi_base_addr); Loading @@ -2712,7 +2717,7 @@ int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size) } /* Enable the MCS and set to x2 clocks */ if (gsi_ctx->per.ver >= GSI_VER_1_2) { if (ver >= GSI_VER_1_2) { value = ((1 << GSI_GSI_MCS_CFG_MCS_ENABLE_SHFT) & GSI_GSI_MCS_CFG_MCS_ENABLE_BMSK); gsi_writel(value, gsi_base + GSI_GSI_MCS_CFG_OFFS); Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +2 −1 Original line number Diff line number Diff line Loading @@ -4046,7 +4046,8 @@ static int ipa3_trigger_fw_loading_mdms(void) } result = gsi_enable_fw(ipa3_res.transport_mem_base, ipa3_res.transport_mem_size); ipa3_res.transport_mem_size, ipa3_get_gsi_ver(ipa3_res.ipa_hw_type)); if (result) { IPAERR("Failed to enable GSI FW\n"); release_firmware(fw); Loading
include/linux/msm_gsi.h +2 −1 Original line number Diff line number Diff line Loading @@ -1035,10 +1035,11 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size, * * @gsi_base_addr: Base address of GSI register space * @gsi_size: Mapping size of the GSI register space * @ver: GSI core version * @Return gsi_status */ int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size); int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size, enum gsi_ver ver); /** * gsi_get_inst_ram_offset_and_size - Peripheral should call this function Loading