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Commit eba65d17 authored by John Keeping's avatar John Keeping Committed by Mark Brown
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ASoC: rockchip: i2s: separate capture and playback



If we only clear the tx/rx state when both are disabled it is not
possible to start/stop one multiple times while the other is running.
Since the two are independently controlled, treat them as such and
remove the false dependency between capture and playback.

Signed-off-by: default avatarJohn Keeping <john@metanate.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 7fd9093a
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+32 −40
Original line number Diff line number Diff line
@@ -82,8 +82,8 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
				   I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE);

		regmap_update_bits(i2s->regmap, I2S_XFER,
				   I2S_XFER_TXS_START | I2S_XFER_RXS_START,
				   I2S_XFER_TXS_START | I2S_XFER_RXS_START);
				   I2S_XFER_TXS_START,
				   I2S_XFER_TXS_START);

		i2s->tx_start = true;
	} else {
@@ -92,21 +92,18 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
		regmap_update_bits(i2s->regmap, I2S_DMACR,
				   I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE);

		if (!i2s->rx_start) {
		regmap_update_bits(i2s->regmap, I2S_XFER,
					   I2S_XFER_TXS_START |
					   I2S_XFER_RXS_START,
					   I2S_XFER_TXS_STOP |
					   I2S_XFER_RXS_STOP);
				   I2S_XFER_TXS_START,
				   I2S_XFER_TXS_STOP);

		regmap_update_bits(i2s->regmap, I2S_CLR,
					   I2S_CLR_TXC | I2S_CLR_RXC,
					   I2S_CLR_TXC | I2S_CLR_RXC);
				   I2S_CLR_TXC,
				   I2S_CLR_TXC);

		regmap_read(i2s->regmap, I2S_CLR, &val);

		/* Should wait for clear operation to finish */
			while (val) {
		while (val & I2S_CLR_TXC) {
			regmap_read(i2s->regmap, I2S_CLR, &val);
			retry--;
			if (!retry) {
@@ -116,7 +113,6 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
		}
	}
}
}

static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
{
@@ -128,8 +124,8 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
				   I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE);

		regmap_update_bits(i2s->regmap, I2S_XFER,
				   I2S_XFER_TXS_START | I2S_XFER_RXS_START,
				   I2S_XFER_TXS_START | I2S_XFER_RXS_START);
				   I2S_XFER_RXS_START,
				   I2S_XFER_RXS_START);

		i2s->rx_start = true;
	} else {
@@ -138,21 +134,18 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
		regmap_update_bits(i2s->regmap, I2S_DMACR,
				   I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE);

		if (!i2s->tx_start) {
		regmap_update_bits(i2s->regmap, I2S_XFER,
					   I2S_XFER_TXS_START |
				   I2S_XFER_RXS_START,
					   I2S_XFER_TXS_STOP |
				   I2S_XFER_RXS_STOP);

		regmap_update_bits(i2s->regmap, I2S_CLR,
					   I2S_CLR_TXC | I2S_CLR_RXC,
					   I2S_CLR_TXC | I2S_CLR_RXC);
				   I2S_CLR_RXC,
				   I2S_CLR_RXC);

		regmap_read(i2s->regmap, I2S_CLR, &val);

		/* Should wait for clear operation to finish */
			while (val) {
		while (val & I2S_CLR_RXC) {
			regmap_read(i2s->regmap, I2S_CLR, &val);
			retry--;
			if (!retry) {
@@ -162,7 +155,6 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
		}
	}
}
}

static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
				unsigned int fmt)