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Commit eb544433 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon: group r6xx/r7xx sequential blit state 



group state that is emitted sequentially into fewer packets.
This saves a number of dwords.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 7fc8878c

drivers/gpu/drm/radeon/r600_blit_shaders.c

+64 −376
Original line number Diff line number Diff line
@@ -70,12 +70,9 @@ const u32 r6xx_default_state[] = 
	0x0000060e,

	0x01020204, /* DB_WATERMARKS */



	0xc0016f00,

	0xc0026f00,

	0x00000000,

	0x00000000, /* SQ_VTX_BASE_VTX_LOC */



	0xc0016f00,

	0x00000001,

	0x00000000, /* SQ_VTX_START_INST_LOC */



	0xc0096900,
@@ -94,32 +91,23 @@ const u32 r6xx_default_state[] = 
	0x00000004,

	0x00000000, /* DB_DEPTH_INFO */



	0xc0016900,

	0xc0026900,

	0x0000000a,

	0x00000000, /* DB_STENCIL_CLEAR */



	0xc0016900,

	0x0000000b,

	0x00000000, /* DB_DEPTH_CLEAR */



	0xc0016900,

	0xc0026900,

	0x0000010c,

	0x00000000, /* DB_STENCILREFMASK */



	0xc0016900,

	0x0000010d,

	0x00000000, /* DB_STENCILREFMASK_BF */



	0xc0016900,

	0x00000200,

	0x00000000, /* DB_DEPTH_CONTROL */



	0xc0016900,

	0xc0026900,

	0x00000343,

	0x00000060, /* DB_RENDER_CONTROL */



	0xc0016900,

	0x00000344,

	0x00000040, /* DB_RENDER_OVERRIDE */



	0xc0016900,
@@ -134,15 +122,12 @@ const u32 r6xx_default_state[] = 
	0x0000010e,

	0x00000000, /* SX_ALPHA_REF */



	0xc0046900,

	0xc0076900,

	0x00000105,

	0x00000000, /* CB_BLEND_RED */

	0x00000000,

	0x00000000,

	0x00000000,



	0xc0036900,

	0x00000109,

	0x00000000, /* CB_FOG_RED */

	0x00000000,

	0x00000000,
@@ -169,52 +154,22 @@ const u32 r6xx_default_state[] = 
	0x00000080,

	0x00000000, /* PA_SC_WINDOW_OFFSET */



	0xc0016900,

	0xc00a6900,

	0x00000083,

	0x0000ffff, /* PA_SC_CLIP_RECT_RULE */



	0xc0016900,

	0x00000084,

	0x00000000, /* PA_SC_WINDOW_SCISSOR_TL */



	0xc0016900,

	0x00000085,

	0x00000000, /* PA_SC_CLIPRECT_0_TL */

	0x20002000,



	0xc0016900,

	0x00000086,

	0x00000000,



	0xc0016900,

	0x00000087,

	0x20002000,



	0xc0016900,

	0x00000088,

	0x00000000,



	0xc0016900,

	0x00000089,

	0x20002000,



	0xc0016900,

	0x0000008a,

	0x00000000,



	0xc0016900,

	0x0000008b,

	0x20002000,



	0xc0016900,

	0x0000008c,

	0x00000000, /* PA_SC_EDGERULE */



	0xc0016900,

	0xc0026900,

	0x00000094,

	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */



	0xc0016900,

	0x00000095,

	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */



	0xc0026900,
@@ -222,12 +177,9 @@ const u32 r6xx_default_state[] = 
	0x00000000, /* PA_SC_VPORT_ZMIN_0 */

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x00000096,

	0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */



	0xc0016900,

	0x00000097,

	0x20002000,



	0xc0026900,
@@ -235,12 +187,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x00000098,

	0x80000000,



	0xc0016900,

	0x00000099,

	0x20002000,



	0xc0026900,
@@ -248,12 +197,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x0000009a,

	0x80000000,



	0xc0016900,

	0x0000009b,

	0x20002000,



	0xc0026900,
@@ -261,12 +207,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x0000009c,

	0x80000000,



	0xc0016900,

	0x0000009d,

	0x20002000,



	0xc0026900,
@@ -274,12 +217,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x0000009e,

	0x80000000,



	0xc0016900,

	0x0000009f,

	0x20002000,



	0xc0026900,
@@ -287,12 +227,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a0,

	0x80000000,



	0xc0016900,

	0x000000a1,

	0x20002000,



	0xc0026900,
@@ -300,12 +237,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a2,

	0x80000000,



	0xc0016900,

	0x000000a3,

	0x20002000,



	0xc0026900,
@@ -313,12 +247,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a4,

	0x80000000,



	0xc0016900,

	0x000000a5,

	0x20002000,



	0xc0026900,
@@ -326,12 +257,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a6,

	0x80000000,



	0xc0016900,

	0x000000a7,

	0x20002000,



	0xc0026900,
@@ -339,12 +267,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a8,

	0x80000000,



	0xc0016900,

	0x000000a9,

	0x20002000,



	0xc0026900,
@@ -352,12 +277,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000aa,

	0x80000000,



	0xc0016900,

	0x000000ab,

	0x20002000,



	0xc0026900,
@@ -365,12 +287,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000ac,

	0x80000000,



	0xc0016900,

	0x000000ad,

	0x20002000,



	0xc0026900,
@@ -378,12 +297,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000ae,

	0x80000000,



	0xc0016900,

	0x000000af,

	0x20002000,



	0xc0026900,
@@ -391,12 +307,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000b0,

	0x80000000,



	0xc0016900,

	0x000000b1,

	0x20002000,



	0xc0026900,
@@ -404,12 +317,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000b2,

	0x80000000,



	0xc0016900,

	0x000000b3,

	0x20002000,



	0xc0026900,
@@ -421,24 +331,18 @@ const u32 r6xx_default_state[] = 
	0x00000293,

	0x00004010, /* PA_SC_MODE_CNTL */



	0xc0016900,

	0xc0026900,

	0x00000300,

	0x00000000, /* PA_SC_LINE_CNTL */



	0xc0016900,

	0x00000301,

	0x00000000, /* PA_SC_AA_CONFIG */



	0xc0016900,

	0x00000312,

	0xffffffff, /* PA_SC_AA_MASK */



	0xc0016900,

	0xc0026900,

	0x00000307,

	0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */



	0xc0016900,

	0x00000308,

	0x00000000,



	0xc0016900,
@@ -458,12 +362,9 @@ const u32 r6xx_default_state[] = 
	0x00000000,

	0x00000000,



	0xc0016900,

	0xc0026900,

	0x00000207,

	0x00000000, /* PA_CL_VS_OUT_CNTL */



	0xc0016900,

	0x00000208,

	0x00000000, /* PA_CL_NANINF_CNTL */



	0xc0046900,
@@ -473,12 +374,9 @@ const u32 r6xx_default_state[] = 
	0x3f800000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x00000280,

	0x00000000, /* PA_SU_POINT_SIZE */



	0xc0016900,

	0x00000281,

	0x00000000, /* PA_SU_POINT_MINMAX */



	0xc0016900,
@@ -517,20 +415,11 @@ const u32 r6xx_default_state[] = 
	0x000001b2,

	0x00000000, /* SPI_THREAD_GROUPING */



	0xc0016900,

	0xc0046900,

	0x000001b6,

	0x00000000, /* SPI_INPUT_Z */



	0xc0016900,

	0x000001b7,

	0x00000000, /* SPI_FOG_CNTL */



	0xc0016900,

	0x000001b8,

	0x00000000, /* SPI_FOG_FUNC_SCALE */



	0xc0016900,

	0x000001b9,

	0x00000000, /* SPI_FOG_FUNC_BIAS */



	0xc0016900,
@@ -545,24 +434,15 @@ const u32 r6xx_default_state[] = 
	0x00000237,

	0x00000000, /* SQ_PGM_CF_OFFSET_FS */



	0xc0016900,

	0xc0036900,

	0x00000100,

	0x00000800, /* VGT_MAX_VTX_INDX */



	0xc0016900,

	0x00000101,

	0x00000000, /* VGT_MIN_VTX_INDX */



	0xc0016900,

	0x00000102,

	0x00000000, /* VGT_INDX_OFFSET */



	0xc0016900,

	0xc0026900,

	0x000002a8,

	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */



	0xc0016900,

	0x000002a9,

	0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */



	0xc0016900,
@@ -581,44 +461,17 @@ const u32 r6xx_default_state[] = 
	0x00000285,

	0x00000000, /* VGT_HOS_CNTL */



	0xc0016900,

	0xc00a6900,

	0x00000286,

	0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */



	0xc0016900,

	0x00000287,

	0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */



	0xc0016900,

	0x00000288,

	0x00000000, /* VGT_HOS_REUSE_DEPTH */



	0xc0016900,

	0x00000289,

	0x00000000, /* VGT_GROUP_PRIM_TYPE */



	0xc0016900,

	0x0000028a,

	0x00000000, /* VGT_GROUP_FIRST_DECR */



	0xc0016900,

	0x0000028b,

	0x00000000, /* VGT_GROUP_DECR */



	0xc0016900,

	0x0000028c,

	0x00000000, /* VGT_GROUP_VECT_0_CNTL */



	0xc0016900,

	0x0000028d,

	0x00000000, /* VGT_GROUP_VECT_1_CNTL */



	0xc0016900,

	0x0000028e,

	0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */



	0xc0016900,

	0x0000028f,

	0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */



	0xc0016900,
@@ -629,16 +482,10 @@ const u32 r6xx_default_state[] = 
	0x000002a5,

	0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */



	0xc0016900,

	0xc0036900,

	0x000002ac,

	0x00000000, /* VGT_STRMOUT_EN */



	0xc0016900,

	0x000002ad,

	0x00000000, /* VGT_REUSE_OFF */



	0xc0016900,

	0x000002ae,

	0x00000000, /* VGT_VTX_CNT_EN */



	0xc0016900,
@@ -687,12 +534,9 @@ const u32 r6xx_default_state[] = 
	0x00000185,

	0x00000000, /* SPI_VS_OUT_ID_0 */



	0xc0016900,

	0xc0026900,

	0x000001b3,

	0x00000001, /* SPI_PS_IN_CONTROL_0 */



	0xc0016900,

	0x000001b4,

	0x00000000, /* SPI_PS_IN_CONTROL_1 */



	0xc0016900,
@@ -734,12 +578,9 @@ const u32 r7xx_default_state[] = 
	0x0000060e,

	0x00420204, /* DB_WATERMARKS */



	0xc0016f00,

	0xc0026f00,

	0x00000000,

	0x00000000, /* SQ_VTX_BASE_VTX_LOC */



	0xc0016f00,

	0x00000001,

	0x00000000, /* SQ_VTX_START_INST_LOC */



	0xc0096900,
@@ -758,32 +599,23 @@ const u32 r7xx_default_state[] = 
	0x00000004,

	0x00000000, /* DB_DEPTH_INFO */



	0xc0016900,

	0xc0026900,

	0x0000000a,

	0x00000000, /* DB_STENCIL_CLEAR */



	0xc0016900,

	0x0000000b,

	0x00000000, /* DB_DEPTH_CLEAR */



	0xc0016900,

	0xc0026900,

	0x0000010c,

	0x00000000, /* DB_STENCILREFMASK */



	0xc0016900,

	0x0000010d,

	0x00000000, /* DB_STENCILREFMASK_BF */



	0xc0016900,

	0x00000200,

	0x00000000, /* DB_DEPTH_CONTROL */



	0xc0016900,

	0xc0026900,

	0x00000343,

	0x00000060, /* DB_RENDER_CONTROL */



	0xc0016900,

	0x00000344,

	0x00000000, /* DB_RENDER_OVERRIDE */



	0xc0016900,
@@ -820,52 +652,22 @@ const u32 r7xx_default_state[] = 
	0x00000080,

	0x00000000, /* PA_SC_WINDOW_OFFSET */



	0xc0016900,

	0xc00a6900,

	0x00000083,

	0x0000ffff, /* PA_SC_CLIP_RECT_RULE */



	0xc0016900,

	0x00000084,

	0x00000000, /* PA_SC_WINDOW_SCISSOR_TL */



	0xc0016900,

	0x00000085,

	0x00000000, /* PA_SC_CLIPRECT_0_TL */

	0x20002000,



	0xc0016900,

	0x00000086,

	0x00000000,



	0xc0016900,

	0x00000087,

	0x20002000,



	0xc0016900,

	0x00000088,

	0x00000000,



	0xc0016900,

	0x00000089,

	0x20002000,



	0xc0016900,

	0x0000008a,

	0x00000000,



	0xc0016900,

	0x0000008b,

	0x20002000,



	0xc0016900,

	0x0000008c,

	0xaaaaaaaa, /* PA_SC_EDGERULE */



	0xc0016900,

	0xc0026900,

	0x00000094,

	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */



	0xc0016900,

	0x00000095,

	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */



	0xc0026900,
@@ -873,12 +675,9 @@ const u32 r7xx_default_state[] = 
	0x00000000, /* PA_SC_VPORT_ZMIN_0 */

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x00000096,

	0x80000000,



	0xc0016900,

	0x00000097,

	0x20002000,



	0xc0026900,
@@ -886,12 +685,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x00000098,

	0x80000000,



	0xc0016900,

	0x00000099,

	0x20002000,



	0xc0026900,
@@ -902,9 +698,6 @@ const u32 r7xx_default_state[] = 
	0xc0016900,

	0x0000009a,

	0x80000000,



	0xc0016900,

	0x0000009b,

	0x20002000,



	0xc0026900,
@@ -912,12 +705,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x0000009c,

	0x80000000,



	0xc0016900,

	0x0000009d,

	0x20002000,



	0xc0026900,
@@ -925,12 +715,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x0000009e,

	0x80000000,



	0xc0016900,

	0x0000009f,

	0x20002000,



	0xc0026900,
@@ -938,12 +725,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a0,

	0x80000000,



	0xc0016900,

	0x000000a1,

	0x20002000,



	0xc0026900,
@@ -951,12 +735,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a2,

	0x80000000,



	0xc0016900,

	0x000000a3,

	0x20002000,



	0xc0026900,
@@ -964,12 +745,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a4,

	0x80000000,



	0xc0016900,

	0x000000a5,

	0x20002000,



	0xc0026900,
@@ -977,12 +755,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a6,

	0x80000000,



	0xc0016900,

	0x000000a7,

	0x20002000,



	0xc0026900,
@@ -990,12 +765,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000a8,

	0x80000000,



	0xc0016900,

	0x000000a9,

	0x20002000,



	0xc0026900,
@@ -1003,12 +775,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000aa,

	0x80000000,



	0xc0016900,

	0x000000ab,

	0x20002000,



	0xc0026900,
@@ -1016,12 +785,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000ac,

	0x80000000,



	0xc0016900,

	0x000000ad,

	0x20002000,



	0xc0026900,
@@ -1029,12 +795,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000ae,

	0x80000000,



	0xc0016900,

	0x000000af,

	0x20002000,



	0xc0026900,
@@ -1042,12 +805,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000b0,

	0x80000000,



	0xc0016900,

	0x000000b1,

	0x20002000,



	0xc0026900,
@@ -1055,12 +815,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x000000b2,

	0x80000000,



	0xc0016900,

	0x000000b3,

	0x20002000,



	0xc0026900,
@@ -1072,24 +829,18 @@ const u32 r7xx_default_state[] = 
	0x00000293,

	0x00514000, /* PA_SC_MODE_CNTL */



	0xc0016900,

	0xc0026900,

	0x00000300,

	0x00000000, /* PA_SC_LINE_CNTL */



	0xc0016900,

	0x00000301,

	0x00000000, /* PA_SC_AA_CONFIG */



	0xc0016900,

	0x00000312,

	0xffffffff, /* PA_SC_AA_MASK */



	0xc0016900,

	0xc0026900,

	0x00000307,

	0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */



	0xc0016900,

	0x00000308,

	0x00000000,



	0xc0016900,
@@ -1109,12 +860,9 @@ const u32 r7xx_default_state[] = 
	0x00000000,

	0x00000000,



	0xc0016900,

	0xc0026900,

	0x00000207,

	0x00000000, /* PA_CL_VS_OUT_CNTL */



	0xc0016900,

	0x00000208,

	0x00000000, /* PA_CL_NANINF_CNTL */



	0xc0046900,
@@ -1124,12 +872,9 @@ const u32 r7xx_default_state[] = 
	0x3f800000,

	0x3f800000,



	0xc0016900,

	0xc0026900,

	0x00000280,

	0x00000000, /* PA_SU_POINT_SIZE */



	0xc0016900,

	0x00000281,

	0x00000000, /* PA_SU_POINT_MINMAX */



	0xc0016900,
@@ -1168,20 +913,11 @@ const u32 r7xx_default_state[] = 
	0x000001b2,

	0x00000001, /* SPI_THREAD_GROUPING */



	0xc0016900,

	0xc0046900,

	0x000001b6,

	0x00000000, /* SPI_INPUT_Z */



	0xc0016900,

	0x000001b7,

	0x00000000, /* SPI_FOG_CNTL */



	0xc0016900,

	0x000001b8,

	0x00000000, /* SPI_FOG_FUNC_SCALE */



	0xc0016900,

	0x000001b9,

	0x00000000, /* SPI_FOG_FUNC_BIAS */



	0xc0016900,
@@ -1196,24 +932,15 @@ const u32 r7xx_default_state[] = 
	0x00000237,

	0x00000000, /* SQ_PGM_CF_OFFSET_FS */



	0xc0016900,

	0xc0036900,

	0x00000100,

	0x00000800, /* VGT_MAX_VTX_INDX */



	0xc0016900,

	0x00000101,

	0x00000000, /* VGT_MIN_VTX_INDX */



	0xc0016900,

	0x00000102,

	0x00000000, /* VGT_INDX_OFFSET */



	0xc0016900,

	0xc0026900,

	0x000002a8,

	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */



	0xc0016900,

	0x000002a9,

	0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */



	0xc0016900,
@@ -1228,48 +955,18 @@ const u32 r7xx_default_state[] = 
	0x00000290,

	0x00000000, /* VGT_GS_MODE */



	0xc0016900,

	0xc00b6900,

	0x00000285,

	0x00000000, /* VGT_HOS_CNTL */



	0xc0016900,

	0x00000286,

	0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */



	0xc0016900,

	0x00000287,

	0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */



	0xc0016900,

	0x00000288,

	0x00000000, /* VGT_HOS_REUSE_DEPTH */



	0xc0016900,

	0x00000289,

	0x00000000, /* VGT_GROUP_PRIM_TYPE */



	0xc0016900,

	0x0000028a,

	0x00000000, /* VGT_GROUP_FIRST_DECR */



	0xc0016900,

	0x0000028b,

	0x00000000, /* VGT_GROUP_DECR */



	0xc0016900,

	0x0000028c,

	0x00000000, /* VGT_GROUP_VECT_0_CNTL */



	0xc0016900,

	0x0000028d,

	0x00000000, /* VGT_GROUP_VECT_1_CNTL */



	0xc0016900,

	0x0000028e,

	0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */



	0xc0016900,

	0x0000028f,

	0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */



	0xc0016900,
@@ -1280,16 +977,10 @@ const u32 r7xx_default_state[] = 
	0x000002a5,

	0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */



	0xc0016900,

	0xc0036900,

	0x000002ac,

	0x00000000, /* VGT_STRMOUT_EN */



	0xc0016900,

	0x000002ad,

	0x00000000, /* VGT_REUSE_OFF */



	0xc0016900,

	0x000002ae,

	0x00000000, /* VGT_VTX_CNT_EN */



	0xc0016900,
@@ -1338,12 +1029,9 @@ const u32 r7xx_default_state[] = 
	0x00000185,

	0x00000000, /* SPI_VS_OUT_ID_0 */



	0xc0016900,

	0xc0026900,

	0x000001b3,

	0x00000001, /* SPI_PS_IN_CONTROL_0 */



	0xc0016900,

	0x000001b4,

	0x00000000, /* SPI_PS_IN_CONTROL_1 */



	0xc0016900,