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Commit eb2b9d47 authored by Heiko Stuebner's avatar Heiko Stuebner
Browse files

ARM: dts: rockchip: add watchdog node



This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 23c93bc9
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+4 −0
Original line number Original line Diff line number Diff line
@@ -188,3 +188,7 @@
&uart3 {
&uart3 {
	status = "okay";
	status = "okay";
};
};

&wdt {
	status = "okay";
};
+4 −0
Original line number Original line Diff line number Diff line
@@ -425,3 +425,7 @@
	pinctrl-names = "default";
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_xfer>;
	pinctrl-0 = <&uart3_xfer>;
};
};

&wdt {
	compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
};
+4 −0
Original line number Original line Diff line number Diff line
@@ -221,3 +221,7 @@
&uart3 {
&uart3 {
	status = "okay";
	status = "okay";
};
};

&wdt {
	status = "okay";
};
+4 −0
Original line number Original line Diff line number Diff line
@@ -400,3 +400,7 @@
	pinctrl-names = "default";
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_xfer>;
	pinctrl-0 = <&uart3_xfer>;
};
};

&wdt {
	compatible = "rockchip,rk3188-wdt", "snps,dw-wdt";
};
+8 −0
Original line number Original line Diff line number Diff line
@@ -174,6 +174,14 @@
		status = "disabled";
		status = "disabled";
	};
	};


	wdt: watchdog@2004c000 {
		compatible = "snps,dw-wdt";
		reg = <0x2004c000 0x100>;
		clocks = <&cru PCLK_WDT>;
		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	pwm2: pwm@20050020 {
	pwm2: pwm@20050020 {
		compatible = "rockchip,rk2928-pwm";
		compatible = "rockchip,rk2928-pwm";
		reg = <0x20050020 0x10>;
		reg = <0x20050020 0x10>;