Loading drivers/gpu/drm/msm/sde/sde_hw_sspp.c +5 −10 Original line number Diff line number Diff line Loading @@ -751,9 +751,7 @@ static void _sde_hw_sspp_setup_scaler3(struct sde_hw_pipe *ctx, */ static void sde_hw_sspp_setup_rects(struct sde_hw_pipe *ctx, struct sde_hw_pipe_cfg *cfg, struct sde_hw_pixel_ext *pe_ext, enum sde_sspp_multirect_index rect_index, void *scale_cfg) enum sde_sspp_multirect_index rect_index) { struct sde_hw_blk_reg_map *c; u32 src_size, src_xy, dst_size, dst_xy, ystride0, ystride1; Loading @@ -778,9 +776,6 @@ static void sde_hw_sspp_setup_rects(struct sde_hw_pipe *ctx, out_xy_off = SSPP_OUT_XY_REC1; } /* program pixel extension override */ if (pe_ext) sde_hw_sspp_setup_pe_config(ctx, pe_ext); /* src and dest rect programming */ src_xy = (cfg->src_rect.y << 16) | (cfg->src_rect.x); Loading Loading @@ -811,7 +806,6 @@ static void sde_hw_sspp_setup_rects(struct sde_hw_pipe *ctx, /* program decimation */ decimation = ((1 << cfg->horz_decimation) - 1) << 8; decimation |= ((1 << cfg->vert_decimation) - 1); ctx->ops.setup_scaler(ctx, cfg, pe_ext, scale_cfg); } /* rectangle register programming */ Loading Loading @@ -1000,6 +994,7 @@ static void _setup_layer_ops(struct sde_hw_pipe *c, c->ops.setup_rects = sde_hw_sspp_setup_rects; c->ops.setup_sourceaddress = sde_hw_sspp_setup_sourceaddress; c->ops.setup_solidfill = sde_hw_sspp_setup_solidfill; c->ops.setup_pe = sde_hw_sspp_setup_pe_config; } if (test_bit(SDE_SSPP_EXCL_RECT, &features)) Loading @@ -1016,16 +1011,16 @@ static void _setup_layer_ops(struct sde_hw_pipe *c, test_bit(SDE_SSPP_CSC_10BIT, &features)) c->ops.setup_csc = sde_hw_sspp_setup_csc; if (test_bit(SDE_SSPP_SCALER_QSEED2, &features)) if (test_bit(SDE_SSPP_SCALER_QSEED2, &features)) { c->ops.setup_sharpening = sde_hw_sspp_setup_sharpening; c->ops.setup_scaler = _sde_hw_sspp_setup_scaler; } if (sde_hw_sspp_multirect_enabled(c->cap)) c->ops.setup_multirect = sde_hw_sspp_setup_multirect; if (test_bit(SDE_SSPP_SCALER_QSEED3, &features)) c->ops.setup_scaler = _sde_hw_sspp_setup_scaler3; else c->ops.setup_scaler = _sde_hw_sspp_setup_scaler; if (test_bit(SDE_SSPP_HSIC, &features)) { /* TODO: add version based assignment here as inline or macro */ Loading drivers/gpu/drm/msm/sde/sde_hw_sspp.h +9 −5 Original line number Diff line number Diff line Loading @@ -328,15 +328,19 @@ struct sde_hw_sspp_ops { * setup_rects - setup pipe ROI rectangles * @ctx: Pointer to pipe context * @cfg: Pointer to pipe config structure * @pe_ext: Pointer to pixel ext settings * @index: rectangle index in multirect * @scale_cfg: Pointer to scaler settings */ void (*setup_rects)(struct sde_hw_pipe *ctx, struct sde_hw_pipe_cfg *cfg, struct sde_hw_pixel_ext *pe_ext, enum sde_sspp_multirect_index index, void *scale_cfg); enum sde_sspp_multirect_index index); /** * setup_pe - setup pipe pixel extension * @ctx: Pointer to pipe context * @pe_ext: Pointer to pixel ext settings */ void (*setup_pe)(struct sde_hw_pipe *ctx, struct sde_hw_pixel_ext *pe_ext); /** * setup_excl_rect - setup pipe exclusion rectangle Loading drivers/gpu/drm/msm/sde/sde_plane.c +18 −9 Original line number Diff line number Diff line Loading @@ -1104,8 +1104,6 @@ static int _sde_plane_color_fill(struct sde_plane *psde, psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w; psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h; _sde_plane_setup_scaler(psde, fmt, 0); if (psde->pipe_hw->ops.setup_format) psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, SDE_SSPP_SOLID_FILL, Loading @@ -1113,9 +1111,13 @@ static int _sde_plane_color_fill(struct sde_plane *psde, if (psde->pipe_hw->ops.setup_rects) psde->pipe_hw->ops.setup_rects(psde->pipe_hw, &psde->pipe_cfg, &psde->pixel_ext, pstate->multirect_index, psde->scaler3_cfg); &psde->pipe_cfg, pstate->multirect_index); _sde_plane_setup_scaler(psde, fmt, 0); if (psde->pipe_hw->ops.setup_pe) psde->pipe_hw->ops.setup_pe(psde->pipe_hw, &psde->pixel_ext); } return 0; Loading Loading @@ -1238,13 +1240,20 @@ static int _sde_plane_mode_set(struct drm_plane *plane, /* skip remaining processing on color fill */ pstate->dirty = 0x0; } else if (psde->pipe_hw->ops.setup_rects) { psde->pipe_hw->ops.setup_rects(psde->pipe_hw, &psde->pipe_cfg, pstate->multirect_index); } _sde_plane_setup_scaler(psde, fmt, pstate); if (psde->pipe_hw->ops.setup_pe) psde->pipe_hw->ops.setup_pe(psde->pipe_hw, &psde->pixel_ext); psde->pipe_hw->ops.setup_rects(psde->pipe_hw, if (psde->pipe_hw->ops.setup_scaler) psde->pipe_hw->ops.setup_scaler(psde->pipe_hw, &psde->pipe_cfg, &psde->pixel_ext, pstate->multirect_index, psde->scaler3_cfg); } /* update excl rect */ if (psde->pipe_hw->ops.setup_excl_rect) Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_sspp.c +5 −10 Original line number Diff line number Diff line Loading @@ -751,9 +751,7 @@ static void _sde_hw_sspp_setup_scaler3(struct sde_hw_pipe *ctx, */ static void sde_hw_sspp_setup_rects(struct sde_hw_pipe *ctx, struct sde_hw_pipe_cfg *cfg, struct sde_hw_pixel_ext *pe_ext, enum sde_sspp_multirect_index rect_index, void *scale_cfg) enum sde_sspp_multirect_index rect_index) { struct sde_hw_blk_reg_map *c; u32 src_size, src_xy, dst_size, dst_xy, ystride0, ystride1; Loading @@ -778,9 +776,6 @@ static void sde_hw_sspp_setup_rects(struct sde_hw_pipe *ctx, out_xy_off = SSPP_OUT_XY_REC1; } /* program pixel extension override */ if (pe_ext) sde_hw_sspp_setup_pe_config(ctx, pe_ext); /* src and dest rect programming */ src_xy = (cfg->src_rect.y << 16) | (cfg->src_rect.x); Loading Loading @@ -811,7 +806,6 @@ static void sde_hw_sspp_setup_rects(struct sde_hw_pipe *ctx, /* program decimation */ decimation = ((1 << cfg->horz_decimation) - 1) << 8; decimation |= ((1 << cfg->vert_decimation) - 1); ctx->ops.setup_scaler(ctx, cfg, pe_ext, scale_cfg); } /* rectangle register programming */ Loading Loading @@ -1000,6 +994,7 @@ static void _setup_layer_ops(struct sde_hw_pipe *c, c->ops.setup_rects = sde_hw_sspp_setup_rects; c->ops.setup_sourceaddress = sde_hw_sspp_setup_sourceaddress; c->ops.setup_solidfill = sde_hw_sspp_setup_solidfill; c->ops.setup_pe = sde_hw_sspp_setup_pe_config; } if (test_bit(SDE_SSPP_EXCL_RECT, &features)) Loading @@ -1016,16 +1011,16 @@ static void _setup_layer_ops(struct sde_hw_pipe *c, test_bit(SDE_SSPP_CSC_10BIT, &features)) c->ops.setup_csc = sde_hw_sspp_setup_csc; if (test_bit(SDE_SSPP_SCALER_QSEED2, &features)) if (test_bit(SDE_SSPP_SCALER_QSEED2, &features)) { c->ops.setup_sharpening = sde_hw_sspp_setup_sharpening; c->ops.setup_scaler = _sde_hw_sspp_setup_scaler; } if (sde_hw_sspp_multirect_enabled(c->cap)) c->ops.setup_multirect = sde_hw_sspp_setup_multirect; if (test_bit(SDE_SSPP_SCALER_QSEED3, &features)) c->ops.setup_scaler = _sde_hw_sspp_setup_scaler3; else c->ops.setup_scaler = _sde_hw_sspp_setup_scaler; if (test_bit(SDE_SSPP_HSIC, &features)) { /* TODO: add version based assignment here as inline or macro */ Loading
drivers/gpu/drm/msm/sde/sde_hw_sspp.h +9 −5 Original line number Diff line number Diff line Loading @@ -328,15 +328,19 @@ struct sde_hw_sspp_ops { * setup_rects - setup pipe ROI rectangles * @ctx: Pointer to pipe context * @cfg: Pointer to pipe config structure * @pe_ext: Pointer to pixel ext settings * @index: rectangle index in multirect * @scale_cfg: Pointer to scaler settings */ void (*setup_rects)(struct sde_hw_pipe *ctx, struct sde_hw_pipe_cfg *cfg, struct sde_hw_pixel_ext *pe_ext, enum sde_sspp_multirect_index index, void *scale_cfg); enum sde_sspp_multirect_index index); /** * setup_pe - setup pipe pixel extension * @ctx: Pointer to pipe context * @pe_ext: Pointer to pixel ext settings */ void (*setup_pe)(struct sde_hw_pipe *ctx, struct sde_hw_pixel_ext *pe_ext); /** * setup_excl_rect - setup pipe exclusion rectangle Loading
drivers/gpu/drm/msm/sde/sde_plane.c +18 −9 Original line number Diff line number Diff line Loading @@ -1104,8 +1104,6 @@ static int _sde_plane_color_fill(struct sde_plane *psde, psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w; psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h; _sde_plane_setup_scaler(psde, fmt, 0); if (psde->pipe_hw->ops.setup_format) psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt, SDE_SSPP_SOLID_FILL, Loading @@ -1113,9 +1111,13 @@ static int _sde_plane_color_fill(struct sde_plane *psde, if (psde->pipe_hw->ops.setup_rects) psde->pipe_hw->ops.setup_rects(psde->pipe_hw, &psde->pipe_cfg, &psde->pixel_ext, pstate->multirect_index, psde->scaler3_cfg); &psde->pipe_cfg, pstate->multirect_index); _sde_plane_setup_scaler(psde, fmt, 0); if (psde->pipe_hw->ops.setup_pe) psde->pipe_hw->ops.setup_pe(psde->pipe_hw, &psde->pixel_ext); } return 0; Loading Loading @@ -1238,13 +1240,20 @@ static int _sde_plane_mode_set(struct drm_plane *plane, /* skip remaining processing on color fill */ pstate->dirty = 0x0; } else if (psde->pipe_hw->ops.setup_rects) { psde->pipe_hw->ops.setup_rects(psde->pipe_hw, &psde->pipe_cfg, pstate->multirect_index); } _sde_plane_setup_scaler(psde, fmt, pstate); if (psde->pipe_hw->ops.setup_pe) psde->pipe_hw->ops.setup_pe(psde->pipe_hw, &psde->pixel_ext); psde->pipe_hw->ops.setup_rects(psde->pipe_hw, if (psde->pipe_hw->ops.setup_scaler) psde->pipe_hw->ops.setup_scaler(psde->pipe_hw, &psde->pipe_cfg, &psde->pixel_ext, pstate->multirect_index, psde->scaler3_cfg); } /* update excl rect */ if (psde->pipe_hw->ops.setup_excl_rect) Loading