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Commit eac7272a authored by Vijay Viswanath's avatar Vijay Viswanath
Browse files

ARM: dts: msm: Add sdhc1 for sdm670 rumi



Add sdhc1 for enabling eMMC on sdm670 rumi target. This will
enable the kernel to register and use eMMC card in rumi. Currently
bus bandwidth voting and speeds higher than 50Mhz are not supported
in RUMI.

Change-Id: Ia5512c9c0cfbcfeaa7e37778de4b2d6eeaca18a1
Signed-off-by: default avatarVijay Viswanath <vviswana@codeaurora.org>
parent 1996ec83
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+98 −0
Original line number Diff line number Diff line
@@ -1146,5 +1146,103 @@
				};
			};
		};
		/* SDC pin type */
		sdc1_clk_on: sdc1_clk_on {
			config {
				pins = "sdc1_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc1_clk_off: sdc1_clk_off {
			config {
				pins = "sdc1_clk";
				bias-disable;		/* NO pull */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc1_cmd_on: sdc1_cmd_on {
			config {
				pins = "sdc1_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc1_cmd_off: sdc1_cmd_off {
			config {
				pins = "sdc1_cmd";
				num-grp-pins = <1>;
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc1_data_on: sdc1_data_on {
			config {
				pins = "sdc1_data";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc1_data_off: sdc1_data_off {
			config {
				pins = "sdc1_data";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_clk_on: sdc2_clk_on {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_off: sdc2_clk_off {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cmd_on: sdc2_cmd_on {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc2_cmd_off: sdc2_cmd_off {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_data_on: sdc2_data_on {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc2_data_off: sdc2_data_off {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

	};
};
+21 −0
Original line number Diff line number Diff line
@@ -77,3 +77,24 @@
	spm-level = <0>;
	status = "ok";
};

&sdhc_1 {
	vdd-supply = <&pm660l_l4>;
	qcom,vdd-voltage-level = <2960000 2960000>;
	qcom,vdd-current-level = <200 570000>;

	vdd-io-supply = <&pm660_l8>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <200 325000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc1_clk_on  &sdc1_cmd_on &sdc1_data_on>;
	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;

	qcom,clk-rates = <400000 20000000 25000000 50000000>;
	qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";

	status = "ok";
};
+22 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@

	aliases {
		ufshc1 = &ufshc_mem; /* Embedded UFS slot */
		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
	};

	aliases {
@@ -1792,6 +1793,27 @@
		qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>;
		status = "ok";
	};

	sdhc_1: sdhci@7c4000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0x7C4000 0x1000>, <0x7C5000 0x1000>;
		reg-names = "hc_mem", "cmdq_mem";

		interrupts = <0 641 0>, <0 644 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <8>;
		qcom,large-address-bus;

		clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>,
			<&clock_gcc GCC_SDCC1_APPS_CLK>;
		clock-names = "iface_clk", "core_clk";

		qcom,nonremovable;

		qcom,scaling-lower-bus-speed-mode = "DDR52";
		status = "disabled";
	};
};

#include "sdm670-pinctrl.dtsi"