Loading drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h +2 −1 Original line number Diff line number Diff line Loading @@ -108,7 +108,8 @@ void dsi_phy_hw_v3_0_toggle_resync_fifo(struct dsi_phy_hw *phy); /* DSI controller common ops */ u32 dsi_ctrl_hw_cmn_get_interrupt_status(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size); void dsi_ctrl_hw_cmn_clear_interrupt_status(struct dsi_ctrl_hw *ctrl, u32 ints); void dsi_ctrl_hw_cmn_enable_status_interrupts(struct dsi_ctrl_hw *ctrl, u32 ints); Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +9 −2 Original line number Diff line number Diff line Loading @@ -243,6 +243,8 @@ static int dsi_ctrl_debugfs_init(struct dsi_ctrl *dsi_ctrl, dsi_ctrl->cell_index); sde_dbg_reg_register_base(dbg_name, dsi_ctrl->hw.base, msm_iomap_size(dsi_ctrl->pdev, "dsi_ctrl")); sde_dbg_reg_register_dump_range(dbg_name, dbg_name, 0, msm_iomap_size(dsi_ctrl->pdev, "dsi_ctrl"), 0); error_remove_dir: debugfs_remove(dir); error: Loading Loading @@ -272,6 +274,8 @@ static int dsi_ctrl_check_state(struct dsi_ctrl *dsi_ctrl, int rc = 0; struct dsi_ctrl_state_info *state = &dsi_ctrl->current_state; SDE_EVT32(dsi_ctrl->cell_index, op); switch (op) { case DSI_CTRL_OP_POWER_STATE_CHANGE: if (state->power_state == op_state) { Loading Loading @@ -1798,11 +1802,14 @@ static struct platform_driver dsi_ctrl_driver = { #if defined(CONFIG_DEBUG_FS) void dsi_ctrl_debug_dump(void) void dsi_ctrl_debug_dump(u32 *entries, u32 size) { struct list_head *pos, *tmp; struct dsi_ctrl *ctrl = NULL; if (!entries || !size) return; mutex_lock(&dsi_ctrl_list_lock); list_for_each_safe(pos, tmp, &dsi_ctrl_list) { struct dsi_ctrl_list_item *n; Loading @@ -1810,7 +1817,7 @@ void dsi_ctrl_debug_dump(void) n = list_entry(pos, struct dsi_ctrl_list_item, list); ctrl = n->ctrl; pr_err("dsi ctrl:%d\n", ctrl->cell_index); ctrl->hw.ops.debug_bus(&ctrl->hw); ctrl->hw.ops.debug_bus(&ctrl->hw, entries, size); } mutex_unlock(&dsi_ctrl_list_lock); } Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h +3 −1 Original line number Diff line number Diff line Loading @@ -457,8 +457,10 @@ struct dsi_ctrl_hw_ops { /** * debug_bus() - get dsi debug bus status. * @ctrl: Pointer to the controller host hardware. * @entries: Array of dsi debug bus control values. * @size: Size of dsi debug bus control array. */ void (*debug_bus)(struct dsi_ctrl_hw *ctrl); void (*debug_bus)(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size); /** * soft_reset() - perform a soft reset on DSI controller Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c +11 −9 Original line number Diff line number Diff line Loading @@ -459,18 +459,20 @@ void dsi_ctrl_hw_cmn_video_engine_setup(struct dsi_ctrl_hw *ctrl, pr_debug("[DSI_%d] Video engine setup done\n", ctrl->index); } void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl) void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size) { u32 reg = 0; DSI_W32(ctrl, DSI_DEBUG_BUS_CTL, 0x181); u32 reg = 0, i = 0; for (i = 0; i < size; i++) { DSI_W32(ctrl, DSI_DEBUG_BUS_CTL, entries[i]); /* make sure that debug test point is enabled */ wmb(); reg = DSI_R32(ctrl, DSI_DEBUG_BUS_STATUS); pr_err("[DSI_%d] debug bus status:0x%x\n", ctrl->index, reg); pr_err("[DSI_%d] debug bus ctrl: 0x%x status:0x%x\n", ctrl->index, entries[i], reg); } } /** * cmd_engine_setup() - setup dsi host controller for command mode * @ctrl: Pointer to the controller host hardware. Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +12 −0 Original line number Diff line number Diff line Loading @@ -723,6 +723,7 @@ int dsi_display_check_status(void *display, bool te_check_override) dsi_panel_release_panel_lock(panel); return rc; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); if (te_check_override && gpio_is_valid(dsi_display->disp_te_gpio)) status_mode = ESD_MODE_PANEL_TE; Loading @@ -746,6 +747,7 @@ int dsi_display_check_status(void *display, bool te_check_override) dsi_display_clk_ctrl(dsi_display->dsi_clk_handle, DSI_ALL_CLKS, DSI_CLK_OFF); dsi_panel_release_panel_lock(panel); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -3673,6 +3675,7 @@ static int dsi_display_dfps_update(struct dsi_display *display, /* For split DSI, update the clock master first */ pr_debug("configuring seamless dynamic fps\n\n"); SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); m_ctrl = &display->ctrl[display->clk_master_idx]; rc = dsi_ctrl_async_timing_update(m_ctrl->ctrl, timing); Loading Loading @@ -3707,6 +3710,7 @@ static int dsi_display_dfps_update(struct dsi_display *display, panel_mode->dsi_mode_flags = 0; error: SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -5828,6 +5832,7 @@ int dsi_display_prepare(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); mutex_lock(&display->display_lock); mode = display->panel->cur_mode; Loading Loading @@ -5962,6 +5967,7 @@ int dsi_display_prepare(struct dsi_display *display) (void)dsi_panel_post_unprepare(display->panel); error: mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -6185,6 +6191,7 @@ int dsi_display_enable(struct dsi_display *display) pr_err("no valid mode set for the display"); return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); /* Engine states and panel states are populated during splash * resource init and hence we return early Loading Loading @@ -6270,6 +6277,7 @@ int dsi_display_enable(struct dsi_display *display) (void)dsi_panel_disable(display->panel); error: mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -6332,6 +6340,7 @@ int dsi_display_disable(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); mutex_lock(&display->display_lock); rc = dsi_display_wake_up(display); Loading Loading @@ -6360,6 +6369,7 @@ int dsi_display_disable(struct dsi_display *display) display->name, rc); mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -6389,6 +6399,7 @@ int dsi_display_unprepare(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); mutex_lock(&display->display_lock); rc = dsi_display_wake_up(display); Loading Loading @@ -6442,6 +6453,7 @@ int dsi_display_unprepare(struct dsi_display *display) display->name, rc); mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h +2 −1 Original line number Diff line number Diff line Loading @@ -108,7 +108,8 @@ void dsi_phy_hw_v3_0_toggle_resync_fifo(struct dsi_phy_hw *phy); /* DSI controller common ops */ u32 dsi_ctrl_hw_cmn_get_interrupt_status(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size); void dsi_ctrl_hw_cmn_clear_interrupt_status(struct dsi_ctrl_hw *ctrl, u32 ints); void dsi_ctrl_hw_cmn_enable_status_interrupts(struct dsi_ctrl_hw *ctrl, u32 ints); Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +9 −2 Original line number Diff line number Diff line Loading @@ -243,6 +243,8 @@ static int dsi_ctrl_debugfs_init(struct dsi_ctrl *dsi_ctrl, dsi_ctrl->cell_index); sde_dbg_reg_register_base(dbg_name, dsi_ctrl->hw.base, msm_iomap_size(dsi_ctrl->pdev, "dsi_ctrl")); sde_dbg_reg_register_dump_range(dbg_name, dbg_name, 0, msm_iomap_size(dsi_ctrl->pdev, "dsi_ctrl"), 0); error_remove_dir: debugfs_remove(dir); error: Loading Loading @@ -272,6 +274,8 @@ static int dsi_ctrl_check_state(struct dsi_ctrl *dsi_ctrl, int rc = 0; struct dsi_ctrl_state_info *state = &dsi_ctrl->current_state; SDE_EVT32(dsi_ctrl->cell_index, op); switch (op) { case DSI_CTRL_OP_POWER_STATE_CHANGE: if (state->power_state == op_state) { Loading Loading @@ -1798,11 +1802,14 @@ static struct platform_driver dsi_ctrl_driver = { #if defined(CONFIG_DEBUG_FS) void dsi_ctrl_debug_dump(void) void dsi_ctrl_debug_dump(u32 *entries, u32 size) { struct list_head *pos, *tmp; struct dsi_ctrl *ctrl = NULL; if (!entries || !size) return; mutex_lock(&dsi_ctrl_list_lock); list_for_each_safe(pos, tmp, &dsi_ctrl_list) { struct dsi_ctrl_list_item *n; Loading @@ -1810,7 +1817,7 @@ void dsi_ctrl_debug_dump(void) n = list_entry(pos, struct dsi_ctrl_list_item, list); ctrl = n->ctrl; pr_err("dsi ctrl:%d\n", ctrl->cell_index); ctrl->hw.ops.debug_bus(&ctrl->hw); ctrl->hw.ops.debug_bus(&ctrl->hw, entries, size); } mutex_unlock(&dsi_ctrl_list_lock); } Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h +3 −1 Original line number Diff line number Diff line Loading @@ -457,8 +457,10 @@ struct dsi_ctrl_hw_ops { /** * debug_bus() - get dsi debug bus status. * @ctrl: Pointer to the controller host hardware. * @entries: Array of dsi debug bus control values. * @size: Size of dsi debug bus control array. */ void (*debug_bus)(struct dsi_ctrl_hw *ctrl); void (*debug_bus)(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size); /** * soft_reset() - perform a soft reset on DSI controller Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw_cmn.c +11 −9 Original line number Diff line number Diff line Loading @@ -459,18 +459,20 @@ void dsi_ctrl_hw_cmn_video_engine_setup(struct dsi_ctrl_hw *ctrl, pr_debug("[DSI_%d] Video engine setup done\n", ctrl->index); } void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl) void dsi_ctrl_hw_cmn_debug_bus(struct dsi_ctrl_hw *ctrl, u32 *entries, u32 size) { u32 reg = 0; DSI_W32(ctrl, DSI_DEBUG_BUS_CTL, 0x181); u32 reg = 0, i = 0; for (i = 0; i < size; i++) { DSI_W32(ctrl, DSI_DEBUG_BUS_CTL, entries[i]); /* make sure that debug test point is enabled */ wmb(); reg = DSI_R32(ctrl, DSI_DEBUG_BUS_STATUS); pr_err("[DSI_%d] debug bus status:0x%x\n", ctrl->index, reg); pr_err("[DSI_%d] debug bus ctrl: 0x%x status:0x%x\n", ctrl->index, entries[i], reg); } } /** * cmd_engine_setup() - setup dsi host controller for command mode * @ctrl: Pointer to the controller host hardware. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +12 −0 Original line number Diff line number Diff line Loading @@ -723,6 +723,7 @@ int dsi_display_check_status(void *display, bool te_check_override) dsi_panel_release_panel_lock(panel); return rc; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); if (te_check_override && gpio_is_valid(dsi_display->disp_te_gpio)) status_mode = ESD_MODE_PANEL_TE; Loading @@ -746,6 +747,7 @@ int dsi_display_check_status(void *display, bool te_check_override) dsi_display_clk_ctrl(dsi_display->dsi_clk_handle, DSI_ALL_CLKS, DSI_CLK_OFF); dsi_panel_release_panel_lock(panel); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -3673,6 +3675,7 @@ static int dsi_display_dfps_update(struct dsi_display *display, /* For split DSI, update the clock master first */ pr_debug("configuring seamless dynamic fps\n\n"); SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); m_ctrl = &display->ctrl[display->clk_master_idx]; rc = dsi_ctrl_async_timing_update(m_ctrl->ctrl, timing); Loading Loading @@ -3707,6 +3710,7 @@ static int dsi_display_dfps_update(struct dsi_display *display, panel_mode->dsi_mode_flags = 0; error: SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -5828,6 +5832,7 @@ int dsi_display_prepare(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); mutex_lock(&display->display_lock); mode = display->panel->cur_mode; Loading Loading @@ -5962,6 +5967,7 @@ int dsi_display_prepare(struct dsi_display *display) (void)dsi_panel_post_unprepare(display->panel); error: mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -6185,6 +6191,7 @@ int dsi_display_enable(struct dsi_display *display) pr_err("no valid mode set for the display"); return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); /* Engine states and panel states are populated during splash * resource init and hence we return early Loading Loading @@ -6270,6 +6277,7 @@ int dsi_display_enable(struct dsi_display *display) (void)dsi_panel_disable(display->panel); error: mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -6332,6 +6340,7 @@ int dsi_display_disable(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); mutex_lock(&display->display_lock); rc = dsi_display_wake_up(display); Loading Loading @@ -6360,6 +6369,7 @@ int dsi_display_disable(struct dsi_display *display) display->name, rc); mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading Loading @@ -6389,6 +6399,7 @@ int dsi_display_unprepare(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); mutex_lock(&display->display_lock); rc = dsi_display_wake_up(display); Loading Loading @@ -6442,6 +6453,7 @@ int dsi_display_unprepare(struct dsi_display *display) display->name, rc); mutex_unlock(&display->display_lock); SDE_EVT32(SDE_EVTLOG_FUNC_EXIT); return rc; } Loading