Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +19 −0 Original line number Diff line number Diff line Loading @@ -3294,6 +3294,25 @@ u32 dsi_ctrl_collect_misr(struct dsi_ctrl *dsi_ctrl) return misr; } void dsi_ctrl_mask_error_status_interrupts(struct dsi_ctrl *dsi_ctrl) { if (!dsi_ctrl || !dsi_ctrl->hw.ops.error_intr_ctrl || !dsi_ctrl->hw.ops.clear_error_status) { pr_err("Invalid params\n"); return; } /* * Mask DSI error status interrupts and clear error status * register */ mutex_lock(&dsi_ctrl->ctrl_lock); dsi_ctrl->hw.ops.error_intr_ctrl(&dsi_ctrl->hw, false); dsi_ctrl->hw.ops.clear_error_status(&dsi_ctrl->hw, DSI_ERROR_INTERRUPT_COUNT); mutex_unlock(&dsi_ctrl->ctrl_lock); } /** * dsi_ctrl_irq_update() - Put a irq vote to process DSI error * interrupts at any time. Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +7 −0 Original line number Diff line number Diff line Loading @@ -712,6 +712,13 @@ int dsi_message_validate_tx_mode(struct dsi_ctrl *dsi_ctrl, u32 cmd_len, */ void dsi_ctrl_isr_configure(struct dsi_ctrl *dsi_ctrl, bool enable); /** * dsi_ctrl_mask_error_status_interrupts() - API to mask dsi ctrl error status * interrupts * @dsi_ctrl: DSI controller handle. */ void dsi_ctrl_mask_error_status_interrupts(struct dsi_ctrl *dsi_ctrl); /** * dsi_ctrl_irq_update() - Put a irq vote to process DSI error * interrupts at any time. Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +39 −17 Original line number Diff line number Diff line Loading @@ -52,6 +52,40 @@ static const struct of_device_id dsi_display_dt_match[] = { static struct dsi_display *main_display; static void dsi_display_mask_ctrl_error_interrupts(struct dsi_display *display) { int i; struct dsi_display_ctrl *ctrl; if (!display) return; for (i = 0; (i < display->ctrl_count) && (i < MAX_DSI_CTRLS_PER_DISPLAY); i++) { ctrl = &display->ctrl[i]; if (!ctrl) continue; dsi_ctrl_mask_error_status_interrupts(ctrl->ctrl); } } static void dsi_display_ctrl_irq_update(struct dsi_display *display, bool en) { int i; struct dsi_display_ctrl *ctrl; if (!display) return; for (i = 0; (i < display->ctrl_count) && (i < MAX_DSI_CTRLS_PER_DISPLAY); i++) { ctrl = &display->ctrl[i]; if (!ctrl) continue; dsi_ctrl_irq_update(ctrl->ctrl, en); } } void dsi_rect_intersect(const struct dsi_rect *r1, const struct dsi_rect *r2, struct dsi_rect *result) Loading Loading @@ -502,6 +536,11 @@ static int dsi_display_status_reg_read(struct dsi_display *display) } } exit: if (rc <= 0) { dsi_display_ctrl_irq_update(display, false); dsi_display_mask_ctrl_error_interrupts(display); } dsi_display_cmd_engine_disable(display); done: return rc; Loading Loading @@ -2569,23 +2608,6 @@ static void dsi_display_ctrl_isr_configure(struct dsi_display *display, bool en) } } static void dsi_display_ctrl_irq_update(struct dsi_display *display, bool en) { int i; struct dsi_display_ctrl *ctrl; if (!display) return; for (i = 0; (i < display->ctrl_count) && (i < MAX_DSI_CTRLS_PER_DISPLAY); i++) { ctrl = &display->ctrl[i]; if (!ctrl) continue; dsi_ctrl_irq_update(ctrl->ctrl, en); } } int dsi_pre_clkoff_cb(void *priv, enum dsi_clk_type clk, enum dsi_clk_state new_state) Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +19 −0 Original line number Diff line number Diff line Loading @@ -3294,6 +3294,25 @@ u32 dsi_ctrl_collect_misr(struct dsi_ctrl *dsi_ctrl) return misr; } void dsi_ctrl_mask_error_status_interrupts(struct dsi_ctrl *dsi_ctrl) { if (!dsi_ctrl || !dsi_ctrl->hw.ops.error_intr_ctrl || !dsi_ctrl->hw.ops.clear_error_status) { pr_err("Invalid params\n"); return; } /* * Mask DSI error status interrupts and clear error status * register */ mutex_lock(&dsi_ctrl->ctrl_lock); dsi_ctrl->hw.ops.error_intr_ctrl(&dsi_ctrl->hw, false); dsi_ctrl->hw.ops.clear_error_status(&dsi_ctrl->hw, DSI_ERROR_INTERRUPT_COUNT); mutex_unlock(&dsi_ctrl->ctrl_lock); } /** * dsi_ctrl_irq_update() - Put a irq vote to process DSI error * interrupts at any time. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +7 −0 Original line number Diff line number Diff line Loading @@ -712,6 +712,13 @@ int dsi_message_validate_tx_mode(struct dsi_ctrl *dsi_ctrl, u32 cmd_len, */ void dsi_ctrl_isr_configure(struct dsi_ctrl *dsi_ctrl, bool enable); /** * dsi_ctrl_mask_error_status_interrupts() - API to mask dsi ctrl error status * interrupts * @dsi_ctrl: DSI controller handle. */ void dsi_ctrl_mask_error_status_interrupts(struct dsi_ctrl *dsi_ctrl); /** * dsi_ctrl_irq_update() - Put a irq vote to process DSI error * interrupts at any time. Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +39 −17 Original line number Diff line number Diff line Loading @@ -52,6 +52,40 @@ static const struct of_device_id dsi_display_dt_match[] = { static struct dsi_display *main_display; static void dsi_display_mask_ctrl_error_interrupts(struct dsi_display *display) { int i; struct dsi_display_ctrl *ctrl; if (!display) return; for (i = 0; (i < display->ctrl_count) && (i < MAX_DSI_CTRLS_PER_DISPLAY); i++) { ctrl = &display->ctrl[i]; if (!ctrl) continue; dsi_ctrl_mask_error_status_interrupts(ctrl->ctrl); } } static void dsi_display_ctrl_irq_update(struct dsi_display *display, bool en) { int i; struct dsi_display_ctrl *ctrl; if (!display) return; for (i = 0; (i < display->ctrl_count) && (i < MAX_DSI_CTRLS_PER_DISPLAY); i++) { ctrl = &display->ctrl[i]; if (!ctrl) continue; dsi_ctrl_irq_update(ctrl->ctrl, en); } } void dsi_rect_intersect(const struct dsi_rect *r1, const struct dsi_rect *r2, struct dsi_rect *result) Loading Loading @@ -502,6 +536,11 @@ static int dsi_display_status_reg_read(struct dsi_display *display) } } exit: if (rc <= 0) { dsi_display_ctrl_irq_update(display, false); dsi_display_mask_ctrl_error_interrupts(display); } dsi_display_cmd_engine_disable(display); done: return rc; Loading Loading @@ -2569,23 +2608,6 @@ static void dsi_display_ctrl_isr_configure(struct dsi_display *display, bool en) } } static void dsi_display_ctrl_irq_update(struct dsi_display *display, bool en) { int i; struct dsi_display_ctrl *ctrl; if (!display) return; for (i = 0; (i < display->ctrl_count) && (i < MAX_DSI_CTRLS_PER_DISPLAY); i++) { ctrl = &display->ctrl[i]; if (!ctrl) continue; dsi_ctrl_irq_update(ctrl->ctrl, en); } } int dsi_pre_clkoff_cb(void *priv, enum dsi_clk_type clk, enum dsi_clk_state new_state) Loading