Loading arch/arm64/boot/dts/qcom/sdm845-cdp.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -291,6 +291,24 @@ aliases { &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { Loading arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -262,6 +262,24 @@ aliases { &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { Loading arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi +70 −0 Original line number Diff line number Diff line Loading @@ -1556,6 +1556,68 @@ }; }; nfc { nfc_int_active: nfc_int_active { /* active state */ mux { /* GPIO 63 NFC Read Interrupt */ pins = "gpio63"; function = "gpio"; }; config { pins = "gpio63"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_int_suspend: nfc_int_suspend { /* sleep state */ mux { /* GPIO 63 NFC Read Interrupt */ pins = "gpio63"; function = "gpio"; }; config { pins = "gpio63"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_active: nfc_enable_active { /* active state */ mux { /* 12: NFC ENABLE 116:ESE Enable */ pins = "gpio12", "gpio62", "gpio116"; function = "gpio"; }; config { pins = "gpio12", "gpio62", "gpio116"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_suspend: nfc_enable_suspend { /* sleep state */ mux { /* 12: NFC ENABLE 116:ESE Enable */ pins = "gpio12", "gpio62", "gpio116"; function = "gpio"; }; config { pins = "gpio12", "gpio62", "gpio116"; drive-strength = <2>; /* 2 MA */ bias-disable; }; }; }; qupv3_se3_spi_pins: qupv3_se3_spi_pins { qupv3_se3_spi_active: qupv3_se3_spi_active { mux { Loading Loading @@ -2681,6 +2743,14 @@ }; &pm8998_gpios { gpio@d400 { qcom,mode = <0>; qcom,vin-sel = <1>; qcom,src-sel = <0>; qcom,master-en = <1>; status = "okay"; }; key_home { key_home_default: key_home_default { pins = "gpio5"; Loading arch/arm64/boot/dts/qcom/sdm845-qrd.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,24 @@ &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { Loading Loading
arch/arm64/boot/dts/qcom/sdm845-cdp.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -291,6 +291,24 @@ aliases { &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { Loading
arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -262,6 +262,24 @@ aliases { &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { Loading
arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi +70 −0 Original line number Diff line number Diff line Loading @@ -1556,6 +1556,68 @@ }; }; nfc { nfc_int_active: nfc_int_active { /* active state */ mux { /* GPIO 63 NFC Read Interrupt */ pins = "gpio63"; function = "gpio"; }; config { pins = "gpio63"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_int_suspend: nfc_int_suspend { /* sleep state */ mux { /* GPIO 63 NFC Read Interrupt */ pins = "gpio63"; function = "gpio"; }; config { pins = "gpio63"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_active: nfc_enable_active { /* active state */ mux { /* 12: NFC ENABLE 116:ESE Enable */ pins = "gpio12", "gpio62", "gpio116"; function = "gpio"; }; config { pins = "gpio12", "gpio62", "gpio116"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; }; nfc_enable_suspend: nfc_enable_suspend { /* sleep state */ mux { /* 12: NFC ENABLE 116:ESE Enable */ pins = "gpio12", "gpio62", "gpio116"; function = "gpio"; }; config { pins = "gpio12", "gpio62", "gpio116"; drive-strength = <2>; /* 2 MA */ bias-disable; }; }; }; qupv3_se3_spi_pins: qupv3_se3_spi_pins { qupv3_se3_spi_active: qupv3_se3_spi_active { mux { Loading Loading @@ -2681,6 +2743,14 @@ }; &pm8998_gpios { gpio@d400 { qcom,mode = <0>; qcom,vin-sel = <1>; qcom,src-sel = <0>; qcom,master-en = <1>; status = "okay"; }; key_home { key_home_default: key_home_default { pins = "gpio5"; Loading
arch/arm64/boot/dts/qcom/sdm845-qrd.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,24 @@ &qupv3_se3_i2c { status = "ok"; nq@28 { compatible = "qcom,nq-nci"; reg = <0x28>; qcom,nq-irq = <&tlmm 63 0x00>; qcom,nq-ven = <&tlmm 12 0x00>; qcom,nq-firm = <&tlmm 62 0x00>; qcom,nq-clkreq = <&pm8998_gpios 21 0x00>; qcom,nq-esepwr = <&tlmm 116 0x00>; interrupt-parent = <&tlmm>; qcom,clk-src = "BBCLK3"; interrupts = <63 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; clocks = <&clock_rpmh RPMH_LN_BB_CLK3>; clock-names = "ref_clk"; }; }; &qupv3_se10_i2c { Loading