Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ea332912 authored by Olaf Hartmann's avatar Olaf Hartmann Committed by David S. Miller
Browse files

[IRDA]: stir4200 fixes.



From: Olaf Hartmann <olaf.hartmann@s1998.tu-chemnitz.de>

The attached patch observes the stir4200 fifo size and will clear the
fifo, if the size is increasing, while it should be transmitting bytes

Signed-off-by: default avatarSamuel Ortiz <samuel@sortiz.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2638698d
Loading
Loading
Loading
Loading
+6 −4
Original line number Diff line number Diff line
@@ -142,9 +142,6 @@ enum StirCtrl2Mask {
};

enum StirFifoCtlMask {
	FIFOCTL_EOF = 0x80,
	FIFOCTL_UNDER = 0x40,
	FIFOCTL_OVER = 0x20,
	FIFOCTL_DIR = 0x10,
	FIFOCTL_CLR = 0x08,
	FIFOCTL_EMPTY = 0x04,
@@ -594,9 +591,10 @@ static int fifo_txwait(struct stir_cb *stir, int space)
{
	int err;
	unsigned long count, status;
	unsigned long prev_count = 0x1fff;

	/* Read FIFO status and count */
	for(;;) {
	for (;; prev_count = count) {
		err = read_reg(stir, REG_FIFOCTL, stir->fifo_status, 
				   FIFO_REGS_SIZE);
		if (unlikely(err != FIFO_REGS_SIZE)) {
@@ -629,6 +627,10 @@ static int fifo_txwait(struct stir_cb *stir, int space)
		if (space >= 0 && STIR_FIFO_SIZE - 4 > space + count)
			return 0;

		/* queue confused */
		if (prev_count < count)
			break;

		/* estimate transfer time for remaining chars */
		msleep((count * 8000) / stir->speed);
	}