Loading drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c +51 −29 Original line number Diff line number Diff line Loading @@ -642,42 +642,52 @@ static int cam_icp_mgr_abort_handle( { int rc = 0; unsigned long rem_jiffies; size_t packet_size; int timeout = 5000; struct hfi_cmd_work_data *task_data; struct hfi_cmd_ipebps_async abort_cmd; struct hfi_cmd_ipebps_async *abort_cmd; struct crm_workq_task *task; task = cam_req_mgr_workq_get_task(icp_hw_mgr.cmd_work); if (!task) return -ENOMEM; abort_cmd.size = packet_size = sizeof(struct hfi_cmd_ipebps_async) + sizeof(struct hfi_cmd_abort_destroy) - sizeof(abort_cmd.payload.direct); abort_cmd.pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; sizeof(((struct hfi_cmd_ipebps_async *)0)->payload.direct); abort_cmd = kzalloc(packet_size, GFP_KERNEL); if (!abort_cmd) { rc = -ENOMEM; return rc; } abort_cmd->size = packet_size; abort_cmd->pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; if (ctx_data->icp_dev_acquire_info->dev_type == CAM_ICP_RES_TYPE_BPS) abort_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_BPS_ABORT; abort_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_BPS_ABORT; else abort_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_IPE_ABORT; abort_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_IPE_ABORT; reinit_completion(&ctx_data->wait_complete); abort_cmd.num_fw_handles = 1; abort_cmd.fw_handles[0] = ctx_data->fw_handle; abort_cmd.user_data1 = (uint64_t)ctx_data; abort_cmd.user_data2 = (uint64_t)0x0; memcpy(abort_cmd.payload.direct, &ctx_data->temp_payload, sizeof(uint32_t)); abort_cmd->num_fw_handles = 1; abort_cmd->fw_handles[0] = ctx_data->fw_handle; abort_cmd->user_data1 = (uint64_t)ctx_data; abort_cmd->user_data2 = (uint64_t)0x0; memcpy(abort_cmd->payload.direct, &ctx_data->temp_payload, sizeof(uint64_t)); task_data = (struct hfi_cmd_work_data *)task->payload; task_data->data = (void *)&abort_cmd; task_data->data = (void *)abort_cmd; task_data->request_id = 0; task_data->type = ICP_WORKQ_TASK_CMD_TYPE; task->process_cb = cam_icp_mgr_process_cmd; rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr, CRM_TASK_PRIORITY_0); if (rc) if (rc) { kfree(abort_cmd); return rc; } CAM_DBG(CAM_ICP, "fw_handle = %x ctx_data = %pK", ctx_data->fw_handle, ctx_data); Loading @@ -688,6 +698,7 @@ static int cam_icp_mgr_abort_handle( CAM_DBG(CAM_ICP, "FW timeout/err in abort handle command"); } kfree(abort_cmd); return rc; } Loading @@ -697,41 +708,51 @@ static int cam_icp_mgr_destroy_handle( int rc = 0; int timeout = 5000; unsigned long rem_jiffies; size_t packet_size; struct hfi_cmd_work_data *task_data; struct hfi_cmd_ipebps_async destroy_cmd; struct hfi_cmd_ipebps_async *destroy_cmd; struct crm_workq_task *task; task = cam_req_mgr_workq_get_task(icp_hw_mgr.cmd_work); if (!task) return -ENOMEM; destroy_cmd.size = packet_size = sizeof(struct hfi_cmd_ipebps_async) + sizeof(struct ipe_bps_destroy) - sizeof(destroy_cmd.payload.direct); destroy_cmd.pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; sizeof(struct hfi_cmd_abort_destroy) - sizeof(((struct hfi_cmd_ipebps_async *)0)->payload.direct); destroy_cmd = kzalloc(packet_size, GFP_KERNEL); if (!destroy_cmd) { rc = -ENOMEM; return rc; } destroy_cmd->size = packet_size; destroy_cmd->pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; if (ctx_data->icp_dev_acquire_info->dev_type == CAM_ICP_RES_TYPE_BPS) destroy_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_BPS_DESTROY; destroy_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_BPS_DESTROY; else destroy_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_IPE_DESTROY; destroy_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_IPE_DESTROY; reinit_completion(&ctx_data->wait_complete); destroy_cmd.num_fw_handles = 1; destroy_cmd.fw_handles[0] = ctx_data->fw_handle; destroy_cmd.user_data1 = (uint64_t)ctx_data; destroy_cmd.user_data2 = (uint64_t)0x0; memcpy(destroy_cmd.payload.direct, &ctx_data->temp_payload, sizeof(uint32_t)); destroy_cmd->num_fw_handles = 1; destroy_cmd->fw_handles[0] = ctx_data->fw_handle; destroy_cmd->user_data1 = (uint64_t)ctx_data; destroy_cmd->user_data2 = (uint64_t)0x0; memcpy(destroy_cmd->payload.direct, &ctx_data->temp_payload, sizeof(uint64_t)); task_data = (struct hfi_cmd_work_data *)task->payload; task_data->data = (void *)&destroy_cmd; task_data->data = (void *)destroy_cmd; task_data->request_id = 0; task_data->type = ICP_WORKQ_TASK_CMD_TYPE; task->process_cb = cam_icp_mgr_process_cmd; rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr, CRM_TASK_PRIORITY_0); if (rc) if (rc) { kfree(destroy_cmd); return rc; } CAM_DBG(CAM_ICP, "fw_handle = %x ctx_data = %pK", ctx_data->fw_handle, ctx_data); Loading @@ -742,6 +763,7 @@ static int cam_icp_mgr_destroy_handle( CAM_ERR(CAM_ICP, "FW response timeout: %d", rc); } kfree(destroy_cmd); return rc; } Loading drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c +4 −1 Original line number Diff line number Diff line Loading @@ -691,7 +691,7 @@ static int __cam_isp_ctx_apply_req_in_activated_state( */ ctx_isp = (struct cam_isp_context *) ctx->ctx_priv; if (ctx_isp->active_req_cnt >= 2) { CAM_DBG(CAM_ISP, CAM_ERR_RATE_LIMIT(CAM_ISP, "Reject apply request due to congestion(cnt = %d)", ctx_isp->active_req_cnt); rc = -EFAULT; Loading @@ -706,6 +706,9 @@ static int __cam_isp_ctx_apply_req_in_activated_state( * we are in the middle of the error handling. Need to reject this apply */ if (req->request_id != apply->request_id) { CAM_ERR_RATE_LIMIT(CAM_ISP, "Invalid Request Id asking %llu existing %llu", apply->request_id, req->request_id); rc = -EFAULT; goto end; } Loading drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c +31 −21 Original line number Diff line number Diff line Loading @@ -69,11 +69,11 @@ static int cam_ife_mgr_get_hw_caps(void *hw_mgr_priv, return rc; } static int cam_ife_hw_mgr_is_rdi_res(uint32_t format) static int cam_ife_hw_mgr_is_rdi_res(uint32_t res_id) { int rc = 0; switch (format) { switch (res_id) { case CAM_ISP_IFE_OUT_RES_RDI_0: case CAM_ISP_IFE_OUT_RES_RDI_1: case CAM_ISP_IFE_OUT_RES_RDI_2: Loading Loading @@ -379,11 +379,12 @@ static void cam_ife_mgr_add_base_info( uint32_t i; if (!ctx->num_base) { CAM_DBG(CAM_ISP, "Add split id = %d for base idx = %d", split_id, base_idx); ctx->base[0].split_id = split_id; ctx->base[0].idx = base_idx; ctx->num_base++; CAM_DBG(CAM_ISP, "Add split id = %d for base idx = %d num_base=%d", split_id, base_idx, ctx->num_base); } else { /*Check if base index is alreay exist in the list */ for (i = 0; i < CAM_IFE_HW_NUM_MAX; i++) { Loading @@ -398,11 +399,12 @@ static void cam_ife_mgr_add_base_info( } if (i == CAM_IFE_HW_NUM_MAX) { CAM_DBG(CAM_ISP, "Add split id = %d for base idx = %d", split_id, base_idx); ctx->base[ctx->num_base].split_id = split_id; ctx->base[ctx->num_base].idx = base_idx; ctx->num_base++; CAM_DBG(CAM_ISP, "Add split_id=%d for base idx=%d num_base=%d", split_id, base_idx, ctx->num_base); } } } Loading @@ -427,14 +429,11 @@ static int cam_ife_mgr_process_base_info( for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) { if (!hw_mgr_res->hw_res[i]) continue; res = hw_mgr_res->hw_res[i]; if (res->res_id == CAM_ISP_HW_VFE_IN_CAMIF) cam_ife_mgr_add_base_info(ctx, i, res->hw_intf->hw_idx); else cam_ife_mgr_add_base_info(ctx, CAM_ISP_HW_SPLIT_MAX, CAM_DBG(CAM_ISP, "add base info for hw %d", res->hw_intf->hw_idx); } } Loading Loading @@ -676,7 +675,6 @@ static int cam_ife_hw_mgr_acquire_res_ife_src( vfe_acquire.rsrc_type = CAM_ISP_RESOURCE_VFE_IN; vfe_acquire.tasklet = ife_ctx->common.tasklet_info; vfe_acquire.rsrc_type = CAM_ISP_RESOURCE_VFE_IN; vfe_acquire.vfe_in.cdm_ops = ife_ctx->cdm_ops; switch (csid_res->res_id) { Loading Loading @@ -787,6 +785,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp( csid_acquire.res_id = CAM_IFE_PIX_PATH_RES_IPP; csid_acquire.cid = cid_res_id; csid_acquire.in_port = in_port; csid_acquire.out_port = in_port->data; if (in_port->usage_type) csid_acquire.sync_mode = CAM_ISP_HW_SYNC_MASTER; Loading Loading @@ -1288,8 +1287,10 @@ static int cam_ife_mgr_acquire_hw(void *hw_mgr_priv, } /* Check whether context has only RDI resource */ if (!num_pix_port) if (!num_pix_port) { ife_ctx->is_rdi_only_context = 1; CAM_DBG(CAM_ISP, "RDI only context"); } /* Process base info */ rc = cam_ife_mgr_process_base_info(ife_ctx); Loading Loading @@ -1342,7 +1343,8 @@ static int cam_ife_mgr_config_hw(void *hw_mgr_priv, return -EPERM; } CAM_DBG(CAM_ISP, "Enter ctx id:%d", ctx->ctx_index); CAM_DBG(CAM_ISP, "Enter ctx id:%d num_hw_upd_entries %d", ctx->ctx_index, cfg->num_hw_update_entries); if (cfg->num_hw_update_entries > 0) { cdm_cmd = ctx->cdm_cmd; Loading @@ -1359,6 +1361,7 @@ static int cam_ife_mgr_config_hw(void *hw_mgr_priv, cdm_cmd->cmd[i].len = cmd->len; } CAM_DBG(CAM_ISP, "Submit to CDM"); rc = cam_cdm_submit_bls(ctx->cdm_handle, cdm_cmd); if (rc) CAM_ERR(CAM_ISP, "Failed to apply the configs"); Loading Loading @@ -1914,7 +1917,6 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv, if (rc) return rc; CAM_DBG(CAM_ISP, "enter"); /* Pre parse the packet*/ rc = cam_packet_util_get_kmd_buffer(prepare->packet, &kmd_buf); if (rc) Loading Loading @@ -2011,15 +2013,23 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv, /* Add change base */ rc = cam_isp_add_change_base(prepare, &ctx->res_list_ife_src, ctx->base[i].idx, &kmd_buf); if (rc) if (rc) { CAM_ERR(CAM_ISP, "Failed in change base adding reg_update cmd i=%d, idx=%d, rc=%d", i, ctx->base[i].idx, rc); goto end; } /*Add reg update */ rc = cam_isp_add_reg_update(prepare, &ctx->res_list_ife_src, ctx->base[i].idx, &kmd_buf); if (rc) if (rc) { CAM_ERR(CAM_ISP, "Add Reg_update cmd Failed i=%d, idx=%d, rc=%d", i, ctx->base[i].idx, rc); goto end; } } end: kfree(blob_info.hfr_config); Loading Loading @@ -2804,10 +2814,10 @@ static int cam_ife_hw_mgr_handle_sof( ife_hw_mgr_ctx->common.cb_priv, CAM_ISP_HW_EVENT_SOF, &sof_done_event_data); CAM_DBG(CAM_ISP, "sof_status = %d", sof_status); } CAM_DBG(CAM_ISP, "sof_status = %d", sof_status); /* this is RDI only context so exit from here */ return 0; } Loading drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c +2 −0 Original line number Diff line number Diff line Loading @@ -696,6 +696,8 @@ int cam_isp_add_reg_update( if (rc) return rc; CAM_DBG(CAM_ISP, "Reg update added for res %d hw_id %d", res->res_id, res->hw_intf->hw_idx); reg_update_size += get_regup.used_bytes; } } Loading drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c +208 −91 Original line number Diff line number Diff line Loading @@ -32,12 +32,14 @@ #define CAM_IFE_CSID_TIMEOUT_SLEEP_US 1000 #define CAM_IFE_CSID_TIMEOUT_ALL_US 1000000 #define MEASURE_EN 0 static int cam_ife_csid_is_ipp_format_supported( uint32_t decode_fmt) uint32_t in_format) { int rc = -EINVAL; switch (decode_fmt) { switch (in_format) { case CAM_FORMAT_MIPI_RAW_6: case CAM_FORMAT_MIPI_RAW_8: case CAM_FORMAT_MIPI_RAW_10: Loading @@ -59,127 +61,221 @@ static int cam_ife_csid_is_ipp_format_supported( return rc; } static int cam_ife_csid_get_format(uint32_t input_fmt, uint32_t *path_fmt) static int cam_ife_csid_get_format_rdi( uint32_t in_format, uint32_t out_format, uint32_t *decode_fmt, uint32_t *plain_fmt) { int rc = 0; switch (input_fmt) { switch (in_format) { case CAM_FORMAT_MIPI_RAW_6: switch (out_format) { case CAM_FORMAT_MIPI_RAW_6: *path_fmt = 0; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN8: *decode_fmt = 0x0; *plain_fmt = 0x0; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_8: switch (out_format) { case CAM_FORMAT_MIPI_RAW_8: *path_fmt = 1; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN8: *decode_fmt = 0x1; *plain_fmt = 0x0; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_10: *path_fmt = 2; switch (out_format) { case CAM_FORMAT_MIPI_RAW_10: *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_10: *decode_fmt = 0x2; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_12: *path_fmt = 3; switch (out_format) { case CAM_FORMAT_MIPI_RAW_12: *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_12: *decode_fmt = 0x3; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_14: switch (out_format) { case CAM_FORMAT_MIPI_RAW_14: *path_fmt = 4; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_14: *decode_fmt = 0x4; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_16: switch (out_format) { case CAM_FORMAT_MIPI_RAW_16: *path_fmt = 5; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_16: *decode_fmt = 0x5; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_20: *path_fmt = 6; switch (out_format) { case CAM_FORMAT_MIPI_RAW_20: *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN32_20: *decode_fmt = 0x6; *plain_fmt = 0x2; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_DPCM_10_6_10: *path_fmt = 7; *decode_fmt = 0x7; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_10_8_10: *path_fmt = 8; *decode_fmt = 0x8; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_12_6_12: *path_fmt = 9; *decode_fmt = 0x9; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_12_8_12: *path_fmt = 0xA; *decode_fmt = 0xA; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_14_8_14: *path_fmt = 0xB; *decode_fmt = 0xB; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_14_10_14: *path_fmt = 0xC; *decode_fmt = 0xC; *plain_fmt = 0x1; break; default: CAM_ERR(CAM_ISP, "CSID:%d un supported format", input_fmt); rc = -EINVAL; break; } if (rc) CAM_ERR(CAM_ISP, "Unsupported format pair in %d out %d\n", in_format, out_format); return rc; } static int cam_ife_csid_get_rdi_format(uint32_t input_fmt, uint32_t output_fmt, uint32_t *path_fmt, uint32_t *plain_fmt) static int cam_ife_csid_get_format_ipp( uint32_t in_format, uint32_t *decode_fmt, uint32_t *plain_fmt) { int rc = 0; CAM_DBG(CAM_ISP, "input format:%d output format:%d", input_fmt, output_fmt); CAM_DBG(CAM_ISP, "input format:%d", in_format); switch (output_fmt) { switch (in_format) { case CAM_FORMAT_MIPI_RAW_6: *decode_fmt = 0; *plain_fmt = 0; break; case CAM_FORMAT_MIPI_RAW_8: *decode_fmt = 0x1; *plain_fmt = 0; break; case CAM_FORMAT_MIPI_RAW_10: *decode_fmt = 0x2; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_12: *decode_fmt = 0x3; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_14: *decode_fmt = 0x4; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_16: *decode_fmt = 0x5; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_20: *decode_fmt = 0x6; *plain_fmt = 0x2; break; case CAM_FORMAT_DPCM_10_6_10: *decode_fmt = 0x7; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_10_8_10: *decode_fmt = 0x8; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_12_6_12: case CAM_FORMAT_DPCM_12_8_12: case CAM_FORMAT_DPCM_14_8_14: case CAM_FORMAT_DPCM_14_10_14: *path_fmt = 0xF; *plain_fmt = 0; *decode_fmt = 0x9; *plain_fmt = 0x1; break; case CAM_FORMAT_PLAIN8: rc = cam_ife_csid_get_format(input_fmt, path_fmt); if (rc) goto error; *plain_fmt = 0; case CAM_FORMAT_DPCM_12_8_12: *decode_fmt = 0xA; *plain_fmt = 0x1; break; case CAM_FORMAT_PLAIN16_8: case CAM_FORMAT_PLAIN16_10: case CAM_FORMAT_PLAIN16_12: case CAM_FORMAT_PLAIN16_14: case CAM_FORMAT_PLAIN16_16: rc = cam_ife_csid_get_format(input_fmt, path_fmt); if (rc) goto error; *plain_fmt = 1; case CAM_FORMAT_DPCM_14_8_14: *decode_fmt = 0xB; *plain_fmt = 0x1; break; case CAM_FORMAT_PLAIN32_20: rc = cam_ife_csid_get_format(input_fmt, path_fmt); if (rc) goto error; *plain_fmt = 2; case CAM_FORMAT_DPCM_14_10_14: *decode_fmt = 0xC; *plain_fmt = 0x1; break; default: *path_fmt = 0xF; *plain_fmt = 0; break; CAM_ERR(CAM_ISP, "Unsupported format %d", in_format); rc = -EINVAL; } CAM_DBG(CAM_ISP, "path format value:%d plain format value:%d", *path_fmt, *plain_fmt); CAM_DBG(CAM_ISP, "decode_fmt:%d plain_fmt:%d", *decode_fmt, *plain_fmt); return 0; error: return rc; } static int cam_ife_csid_cid_get(struct cam_ife_csid_hw *csid_hw, struct cam_isp_resource_node **res, int32_t vc, uint32_t dt, uint32_t res_type) Loading Loading @@ -549,7 +645,7 @@ static int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw, goto end; } } else { if (csid_hw->tpg_cfg.decode_fmt != if (csid_hw->tpg_cfg.in_format != cid_reserv->in_port->format || csid_hw->tpg_cfg.width != cid_reserv->in_port->left_width || Loading Loading @@ -585,7 +681,7 @@ static int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw, rc = -EINVAL; goto end; } csid_hw->tpg_cfg.decode_fmt = csid_hw->tpg_cfg.in_format = cid_reserv->in_port->format; csid_hw->tpg_cfg.width = cid_reserv->in_port->left_width; Loading Loading @@ -712,20 +808,9 @@ static int cam_ife_csid_path_reserve(struct cam_ife_csid_hw *csid_hw, res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED; path_data = (struct cam_ife_csid_path_cfg *)res->res_priv; /* store the output format for RDI */ switch (reserve->res_id) { case CAM_IFE_PIX_PATH_RES_RDI_0: case CAM_IFE_PIX_PATH_RES_RDI_1: case CAM_IFE_PIX_PATH_RES_RDI_2: case CAM_IFE_PIX_PATH_RES_RDI_3: path_data->output_fmt = reserve->out_port->format; break; default: break; } path_data->cid = reserve->cid; path_data->decode_fmt = reserve->in_port->format; path_data->in_format = reserve->in_port->format; path_data->out_format = reserve->out_port->format; path_data->master_idx = reserve->master_idx; path_data->sync_mode = reserve->sync_mode; path_data->height = reserve->in_port->height; Loading @@ -746,9 +831,14 @@ static int cam_ife_csid_path_reserve(struct cam_ife_csid_hw *csid_hw, path_data->crop_enable = 1; path_data->start_pixel = reserve->in_port->right_start; path_data->width = reserve->in_port->right_width; } else } else { path_data->crop_enable = 0; path_data->width = reserve->in_port->left_width; path_data->start_pixel = reserve->in_port->left_start; } CAM_DBG(CAM_ISP, "Res %d width %d height %d\n", reserve->res_id, path_data->width, path_data->height); reserve->node_res = res; end: Loading Loading @@ -1027,10 +1117,10 @@ static int cam_ife_csid_config_tpg(struct cam_ife_csid_hw *csid_hw, csid_reg->tpg_reg->csid_tpg_dt_n_cfg_1_addr); /* * decode_fmt is the same as the input resource format. * in_format is the same as the input resource format. * it is one larger than the register spec format. */ val = ((csid_hw->tpg_cfg.decode_fmt - 1) << 16) | 0x8; val = ((csid_hw->tpg_cfg.in_format - 1) << 16) | 0x8; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->tpg_reg->csid_tpg_dt_n_cfg_2_addr); Loading Loading @@ -1160,7 +1250,7 @@ static int cam_ife_csid_init_config_ipp_path( struct cam_ife_csid_path_cfg *path_data; struct cam_ife_csid_reg_offset *csid_reg; struct cam_hw_soc_info *soc_info; uint32_t path_format = 0, val = 0; uint32_t decode_format = 0, plain_format = 0, val = 0; path_data = (struct cam_ife_csid_path_cfg *) res->res_priv; csid_reg = csid_hw->csid_info->csid_reg; Loading @@ -1173,8 +1263,9 @@ static int cam_ife_csid_init_config_ipp_path( return -EINVAL; } CAM_DBG(CAM_ISP, "Enabled IPP Path......."); rc = cam_ife_csid_get_format(path_data->decode_fmt, &path_format); CAM_DBG(CAM_ISP, "Config IPP Path"); rc = cam_ife_csid_get_format_ipp(path_data->in_format, &decode_format, &plain_format); if (rc) return rc; Loading @@ -1185,7 +1276,7 @@ static int cam_ife_csid_init_config_ipp_path( val = (path_data->vc << csid_reg->cmn_reg->vc_shift_val) | (path_data->dt << csid_reg->cmn_reg->dt_shift_val) | (path_data->cid << csid_reg->cmn_reg->dt_id_shift_val) | (path_format << csid_reg->cmn_reg->fmt_shift_val) | (decode_format << csid_reg->cmn_reg->fmt_shift_val) | (path_data->crop_enable & 1 << csid_reg->cmn_reg->crop_h_en_shift_val) | (path_data->crop_enable & 1 << Loading Loading @@ -1330,7 +1421,7 @@ static int cam_ife_csid_enable_ipp_path( return -EINVAL; } CAM_DBG(CAM_ISP, "enable IPP path......."); CAM_DBG(CAM_ISP, "Enable IPP path"); /* Resume at frame boundary */ if (path_data->sync_mode == CAM_ISP_HW_SYNC_MASTER) { Loading Loading @@ -1462,8 +1553,8 @@ static int cam_ife_csid_init_config_rdi_path( return -EINVAL; } rc = cam_ife_csid_get_rdi_format(path_data->decode_fmt, path_data->output_fmt, &path_format, &plain_fmt); rc = cam_ife_csid_get_format_rdi(path_data->in_format, path_data->out_format, &path_format, &plain_fmt); if (rc) return rc; Loading Loading @@ -1536,6 +1627,18 @@ static int cam_ife_csid_init_config_rdi_path( val = cam_io_r_mb(soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr); val |= (1 << csid_reg->cmn_reg->path_en_shift_val); #if MEASURE_EN val |= 0x2; cam_io_w_mb(0x3, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr); cam_io_w_mb(path_data->height << 16 | path_data->width, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg1_addr); CAM_DBG(CAM_ISP, "measure_cfg1 0x%x offset 0x%x\n", path_data->height << 16 | path_data->width, csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr); #endif cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr); Loading Loading @@ -1605,7 +1708,11 @@ static int cam_ife_csid_enable_rdi_path( csid_reg->rdi_reg[id]->csid_rdi_ctrl_addr); /* Enable the required RDI interrupts */ val = CSID_PATH_INFO_RST_DONE | CSID_PATH_ERROR_FIFO_OVERFLOW; val = CSID_PATH_INFO_RST_DONE | #if MEASURE_EN CSID_PATH_INFO_INPUT_SOF | #endif CSID_PATH_ERROR_FIFO_OVERFLOW; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_irq_mask_addr); Loading Loading @@ -2298,6 +2405,9 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) struct cam_ife_csid_reg_offset *csid_reg; uint32_t i, irq_status_top, irq_status_rx, irq_status_ipp = 0, irq_status_rdi[4]; #if MEASURE_EN uint32_t val; #endif csid_hw = (struct cam_ife_csid_hw *)data; Loading Loading @@ -2428,8 +2538,15 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) complete(&csid_hw->csid_rdin_complete[i]); } if (irq_status_rdi[i] & CSID_PATH_INFO_INPUT_SOF) if (irq_status_rdi[i] & CSID_PATH_INFO_INPUT_SOF) { CAM_DBG(CAM_ISP, "CSID RDI SOF received"); #if MEASURE_EN val = cam_io_r(soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[i]-> csid_rdi_format_measure0_addr); CAM_ERR(CAM_ISP, "measure 0x%x\n", val); #endif } if (irq_status_rdi[i] & CSID_PATH_INFO_INPUT_EOF) CAM_DBG(CAM_ISP, "CSID RDI EOF received"); Loading Loading
drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c +51 −29 Original line number Diff line number Diff line Loading @@ -642,42 +642,52 @@ static int cam_icp_mgr_abort_handle( { int rc = 0; unsigned long rem_jiffies; size_t packet_size; int timeout = 5000; struct hfi_cmd_work_data *task_data; struct hfi_cmd_ipebps_async abort_cmd; struct hfi_cmd_ipebps_async *abort_cmd; struct crm_workq_task *task; task = cam_req_mgr_workq_get_task(icp_hw_mgr.cmd_work); if (!task) return -ENOMEM; abort_cmd.size = packet_size = sizeof(struct hfi_cmd_ipebps_async) + sizeof(struct hfi_cmd_abort_destroy) - sizeof(abort_cmd.payload.direct); abort_cmd.pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; sizeof(((struct hfi_cmd_ipebps_async *)0)->payload.direct); abort_cmd = kzalloc(packet_size, GFP_KERNEL); if (!abort_cmd) { rc = -ENOMEM; return rc; } abort_cmd->size = packet_size; abort_cmd->pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; if (ctx_data->icp_dev_acquire_info->dev_type == CAM_ICP_RES_TYPE_BPS) abort_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_BPS_ABORT; abort_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_BPS_ABORT; else abort_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_IPE_ABORT; abort_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_IPE_ABORT; reinit_completion(&ctx_data->wait_complete); abort_cmd.num_fw_handles = 1; abort_cmd.fw_handles[0] = ctx_data->fw_handle; abort_cmd.user_data1 = (uint64_t)ctx_data; abort_cmd.user_data2 = (uint64_t)0x0; memcpy(abort_cmd.payload.direct, &ctx_data->temp_payload, sizeof(uint32_t)); abort_cmd->num_fw_handles = 1; abort_cmd->fw_handles[0] = ctx_data->fw_handle; abort_cmd->user_data1 = (uint64_t)ctx_data; abort_cmd->user_data2 = (uint64_t)0x0; memcpy(abort_cmd->payload.direct, &ctx_data->temp_payload, sizeof(uint64_t)); task_data = (struct hfi_cmd_work_data *)task->payload; task_data->data = (void *)&abort_cmd; task_data->data = (void *)abort_cmd; task_data->request_id = 0; task_data->type = ICP_WORKQ_TASK_CMD_TYPE; task->process_cb = cam_icp_mgr_process_cmd; rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr, CRM_TASK_PRIORITY_0); if (rc) if (rc) { kfree(abort_cmd); return rc; } CAM_DBG(CAM_ICP, "fw_handle = %x ctx_data = %pK", ctx_data->fw_handle, ctx_data); Loading @@ -688,6 +698,7 @@ static int cam_icp_mgr_abort_handle( CAM_DBG(CAM_ICP, "FW timeout/err in abort handle command"); } kfree(abort_cmd); return rc; } Loading @@ -697,41 +708,51 @@ static int cam_icp_mgr_destroy_handle( int rc = 0; int timeout = 5000; unsigned long rem_jiffies; size_t packet_size; struct hfi_cmd_work_data *task_data; struct hfi_cmd_ipebps_async destroy_cmd; struct hfi_cmd_ipebps_async *destroy_cmd; struct crm_workq_task *task; task = cam_req_mgr_workq_get_task(icp_hw_mgr.cmd_work); if (!task) return -ENOMEM; destroy_cmd.size = packet_size = sizeof(struct hfi_cmd_ipebps_async) + sizeof(struct ipe_bps_destroy) - sizeof(destroy_cmd.payload.direct); destroy_cmd.pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; sizeof(struct hfi_cmd_abort_destroy) - sizeof(((struct hfi_cmd_ipebps_async *)0)->payload.direct); destroy_cmd = kzalloc(packet_size, GFP_KERNEL); if (!destroy_cmd) { rc = -ENOMEM; return rc; } destroy_cmd->size = packet_size; destroy_cmd->pkt_type = HFI_CMD_IPEBPS_ASYNC_COMMAND_DIRECT; if (ctx_data->icp_dev_acquire_info->dev_type == CAM_ICP_RES_TYPE_BPS) destroy_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_BPS_DESTROY; destroy_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_BPS_DESTROY; else destroy_cmd.opcode = HFI_IPEBPS_CMD_OPCODE_IPE_DESTROY; destroy_cmd->opcode = HFI_IPEBPS_CMD_OPCODE_IPE_DESTROY; reinit_completion(&ctx_data->wait_complete); destroy_cmd.num_fw_handles = 1; destroy_cmd.fw_handles[0] = ctx_data->fw_handle; destroy_cmd.user_data1 = (uint64_t)ctx_data; destroy_cmd.user_data2 = (uint64_t)0x0; memcpy(destroy_cmd.payload.direct, &ctx_data->temp_payload, sizeof(uint32_t)); destroy_cmd->num_fw_handles = 1; destroy_cmd->fw_handles[0] = ctx_data->fw_handle; destroy_cmd->user_data1 = (uint64_t)ctx_data; destroy_cmd->user_data2 = (uint64_t)0x0; memcpy(destroy_cmd->payload.direct, &ctx_data->temp_payload, sizeof(uint64_t)); task_data = (struct hfi_cmd_work_data *)task->payload; task_data->data = (void *)&destroy_cmd; task_data->data = (void *)destroy_cmd; task_data->request_id = 0; task_data->type = ICP_WORKQ_TASK_CMD_TYPE; task->process_cb = cam_icp_mgr_process_cmd; rc = cam_req_mgr_workq_enqueue_task(task, &icp_hw_mgr, CRM_TASK_PRIORITY_0); if (rc) if (rc) { kfree(destroy_cmd); return rc; } CAM_DBG(CAM_ICP, "fw_handle = %x ctx_data = %pK", ctx_data->fw_handle, ctx_data); Loading @@ -742,6 +763,7 @@ static int cam_icp_mgr_destroy_handle( CAM_ERR(CAM_ICP, "FW response timeout: %d", rc); } kfree(destroy_cmd); return rc; } Loading
drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c +4 −1 Original line number Diff line number Diff line Loading @@ -691,7 +691,7 @@ static int __cam_isp_ctx_apply_req_in_activated_state( */ ctx_isp = (struct cam_isp_context *) ctx->ctx_priv; if (ctx_isp->active_req_cnt >= 2) { CAM_DBG(CAM_ISP, CAM_ERR_RATE_LIMIT(CAM_ISP, "Reject apply request due to congestion(cnt = %d)", ctx_isp->active_req_cnt); rc = -EFAULT; Loading @@ -706,6 +706,9 @@ static int __cam_isp_ctx_apply_req_in_activated_state( * we are in the middle of the error handling. Need to reject this apply */ if (req->request_id != apply->request_id) { CAM_ERR_RATE_LIMIT(CAM_ISP, "Invalid Request Id asking %llu existing %llu", apply->request_id, req->request_id); rc = -EFAULT; goto end; } Loading
drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c +31 −21 Original line number Diff line number Diff line Loading @@ -69,11 +69,11 @@ static int cam_ife_mgr_get_hw_caps(void *hw_mgr_priv, return rc; } static int cam_ife_hw_mgr_is_rdi_res(uint32_t format) static int cam_ife_hw_mgr_is_rdi_res(uint32_t res_id) { int rc = 0; switch (format) { switch (res_id) { case CAM_ISP_IFE_OUT_RES_RDI_0: case CAM_ISP_IFE_OUT_RES_RDI_1: case CAM_ISP_IFE_OUT_RES_RDI_2: Loading Loading @@ -379,11 +379,12 @@ static void cam_ife_mgr_add_base_info( uint32_t i; if (!ctx->num_base) { CAM_DBG(CAM_ISP, "Add split id = %d for base idx = %d", split_id, base_idx); ctx->base[0].split_id = split_id; ctx->base[0].idx = base_idx; ctx->num_base++; CAM_DBG(CAM_ISP, "Add split id = %d for base idx = %d num_base=%d", split_id, base_idx, ctx->num_base); } else { /*Check if base index is alreay exist in the list */ for (i = 0; i < CAM_IFE_HW_NUM_MAX; i++) { Loading @@ -398,11 +399,12 @@ static void cam_ife_mgr_add_base_info( } if (i == CAM_IFE_HW_NUM_MAX) { CAM_DBG(CAM_ISP, "Add split id = %d for base idx = %d", split_id, base_idx); ctx->base[ctx->num_base].split_id = split_id; ctx->base[ctx->num_base].idx = base_idx; ctx->num_base++; CAM_DBG(CAM_ISP, "Add split_id=%d for base idx=%d num_base=%d", split_id, base_idx, ctx->num_base); } } } Loading @@ -427,14 +429,11 @@ static int cam_ife_mgr_process_base_info( for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) { if (!hw_mgr_res->hw_res[i]) continue; res = hw_mgr_res->hw_res[i]; if (res->res_id == CAM_ISP_HW_VFE_IN_CAMIF) cam_ife_mgr_add_base_info(ctx, i, res->hw_intf->hw_idx); else cam_ife_mgr_add_base_info(ctx, CAM_ISP_HW_SPLIT_MAX, CAM_DBG(CAM_ISP, "add base info for hw %d", res->hw_intf->hw_idx); } } Loading Loading @@ -676,7 +675,6 @@ static int cam_ife_hw_mgr_acquire_res_ife_src( vfe_acquire.rsrc_type = CAM_ISP_RESOURCE_VFE_IN; vfe_acquire.tasklet = ife_ctx->common.tasklet_info; vfe_acquire.rsrc_type = CAM_ISP_RESOURCE_VFE_IN; vfe_acquire.vfe_in.cdm_ops = ife_ctx->cdm_ops; switch (csid_res->res_id) { Loading Loading @@ -787,6 +785,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp( csid_acquire.res_id = CAM_IFE_PIX_PATH_RES_IPP; csid_acquire.cid = cid_res_id; csid_acquire.in_port = in_port; csid_acquire.out_port = in_port->data; if (in_port->usage_type) csid_acquire.sync_mode = CAM_ISP_HW_SYNC_MASTER; Loading Loading @@ -1288,8 +1287,10 @@ static int cam_ife_mgr_acquire_hw(void *hw_mgr_priv, } /* Check whether context has only RDI resource */ if (!num_pix_port) if (!num_pix_port) { ife_ctx->is_rdi_only_context = 1; CAM_DBG(CAM_ISP, "RDI only context"); } /* Process base info */ rc = cam_ife_mgr_process_base_info(ife_ctx); Loading Loading @@ -1342,7 +1343,8 @@ static int cam_ife_mgr_config_hw(void *hw_mgr_priv, return -EPERM; } CAM_DBG(CAM_ISP, "Enter ctx id:%d", ctx->ctx_index); CAM_DBG(CAM_ISP, "Enter ctx id:%d num_hw_upd_entries %d", ctx->ctx_index, cfg->num_hw_update_entries); if (cfg->num_hw_update_entries > 0) { cdm_cmd = ctx->cdm_cmd; Loading @@ -1359,6 +1361,7 @@ static int cam_ife_mgr_config_hw(void *hw_mgr_priv, cdm_cmd->cmd[i].len = cmd->len; } CAM_DBG(CAM_ISP, "Submit to CDM"); rc = cam_cdm_submit_bls(ctx->cdm_handle, cdm_cmd); if (rc) CAM_ERR(CAM_ISP, "Failed to apply the configs"); Loading Loading @@ -1914,7 +1917,6 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv, if (rc) return rc; CAM_DBG(CAM_ISP, "enter"); /* Pre parse the packet*/ rc = cam_packet_util_get_kmd_buffer(prepare->packet, &kmd_buf); if (rc) Loading Loading @@ -2011,15 +2013,23 @@ static int cam_ife_mgr_prepare_hw_update(void *hw_mgr_priv, /* Add change base */ rc = cam_isp_add_change_base(prepare, &ctx->res_list_ife_src, ctx->base[i].idx, &kmd_buf); if (rc) if (rc) { CAM_ERR(CAM_ISP, "Failed in change base adding reg_update cmd i=%d, idx=%d, rc=%d", i, ctx->base[i].idx, rc); goto end; } /*Add reg update */ rc = cam_isp_add_reg_update(prepare, &ctx->res_list_ife_src, ctx->base[i].idx, &kmd_buf); if (rc) if (rc) { CAM_ERR(CAM_ISP, "Add Reg_update cmd Failed i=%d, idx=%d, rc=%d", i, ctx->base[i].idx, rc); goto end; } } end: kfree(blob_info.hfr_config); Loading Loading @@ -2804,10 +2814,10 @@ static int cam_ife_hw_mgr_handle_sof( ife_hw_mgr_ctx->common.cb_priv, CAM_ISP_HW_EVENT_SOF, &sof_done_event_data); CAM_DBG(CAM_ISP, "sof_status = %d", sof_status); } CAM_DBG(CAM_ISP, "sof_status = %d", sof_status); /* this is RDI only context so exit from here */ return 0; } Loading
drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c +2 −0 Original line number Diff line number Diff line Loading @@ -696,6 +696,8 @@ int cam_isp_add_reg_update( if (rc) return rc; CAM_DBG(CAM_ISP, "Reg update added for res %d hw_id %d", res->res_id, res->hw_intf->hw_idx); reg_update_size += get_regup.used_bytes; } } Loading
drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c +208 −91 Original line number Diff line number Diff line Loading @@ -32,12 +32,14 @@ #define CAM_IFE_CSID_TIMEOUT_SLEEP_US 1000 #define CAM_IFE_CSID_TIMEOUT_ALL_US 1000000 #define MEASURE_EN 0 static int cam_ife_csid_is_ipp_format_supported( uint32_t decode_fmt) uint32_t in_format) { int rc = -EINVAL; switch (decode_fmt) { switch (in_format) { case CAM_FORMAT_MIPI_RAW_6: case CAM_FORMAT_MIPI_RAW_8: case CAM_FORMAT_MIPI_RAW_10: Loading @@ -59,127 +61,221 @@ static int cam_ife_csid_is_ipp_format_supported( return rc; } static int cam_ife_csid_get_format(uint32_t input_fmt, uint32_t *path_fmt) static int cam_ife_csid_get_format_rdi( uint32_t in_format, uint32_t out_format, uint32_t *decode_fmt, uint32_t *plain_fmt) { int rc = 0; switch (input_fmt) { switch (in_format) { case CAM_FORMAT_MIPI_RAW_6: switch (out_format) { case CAM_FORMAT_MIPI_RAW_6: *path_fmt = 0; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN8: *decode_fmt = 0x0; *plain_fmt = 0x0; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_8: switch (out_format) { case CAM_FORMAT_MIPI_RAW_8: *path_fmt = 1; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN8: *decode_fmt = 0x1; *plain_fmt = 0x0; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_10: *path_fmt = 2; switch (out_format) { case CAM_FORMAT_MIPI_RAW_10: *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_10: *decode_fmt = 0x2; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_12: *path_fmt = 3; switch (out_format) { case CAM_FORMAT_MIPI_RAW_12: *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_12: *decode_fmt = 0x3; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_14: switch (out_format) { case CAM_FORMAT_MIPI_RAW_14: *path_fmt = 4; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_14: *decode_fmt = 0x4; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_16: switch (out_format) { case CAM_FORMAT_MIPI_RAW_16: *path_fmt = 5; *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN16_16: *decode_fmt = 0x5; *plain_fmt = 0x1; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_MIPI_RAW_20: *path_fmt = 6; switch (out_format) { case CAM_FORMAT_MIPI_RAW_20: *decode_fmt = 0xf; break; case CAM_FORMAT_PLAIN32_20: *decode_fmt = 0x6; *plain_fmt = 0x2; break; default: rc = -EINVAL; break; } break; case CAM_FORMAT_DPCM_10_6_10: *path_fmt = 7; *decode_fmt = 0x7; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_10_8_10: *path_fmt = 8; *decode_fmt = 0x8; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_12_6_12: *path_fmt = 9; *decode_fmt = 0x9; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_12_8_12: *path_fmt = 0xA; *decode_fmt = 0xA; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_14_8_14: *path_fmt = 0xB; *decode_fmt = 0xB; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_14_10_14: *path_fmt = 0xC; *decode_fmt = 0xC; *plain_fmt = 0x1; break; default: CAM_ERR(CAM_ISP, "CSID:%d un supported format", input_fmt); rc = -EINVAL; break; } if (rc) CAM_ERR(CAM_ISP, "Unsupported format pair in %d out %d\n", in_format, out_format); return rc; } static int cam_ife_csid_get_rdi_format(uint32_t input_fmt, uint32_t output_fmt, uint32_t *path_fmt, uint32_t *plain_fmt) static int cam_ife_csid_get_format_ipp( uint32_t in_format, uint32_t *decode_fmt, uint32_t *plain_fmt) { int rc = 0; CAM_DBG(CAM_ISP, "input format:%d output format:%d", input_fmt, output_fmt); CAM_DBG(CAM_ISP, "input format:%d", in_format); switch (output_fmt) { switch (in_format) { case CAM_FORMAT_MIPI_RAW_6: *decode_fmt = 0; *plain_fmt = 0; break; case CAM_FORMAT_MIPI_RAW_8: *decode_fmt = 0x1; *plain_fmt = 0; break; case CAM_FORMAT_MIPI_RAW_10: *decode_fmt = 0x2; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_12: *decode_fmt = 0x3; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_14: *decode_fmt = 0x4; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_16: *decode_fmt = 0x5; *plain_fmt = 0x1; break; case CAM_FORMAT_MIPI_RAW_20: *decode_fmt = 0x6; *plain_fmt = 0x2; break; case CAM_FORMAT_DPCM_10_6_10: *decode_fmt = 0x7; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_10_8_10: *decode_fmt = 0x8; *plain_fmt = 0x1; break; case CAM_FORMAT_DPCM_12_6_12: case CAM_FORMAT_DPCM_12_8_12: case CAM_FORMAT_DPCM_14_8_14: case CAM_FORMAT_DPCM_14_10_14: *path_fmt = 0xF; *plain_fmt = 0; *decode_fmt = 0x9; *plain_fmt = 0x1; break; case CAM_FORMAT_PLAIN8: rc = cam_ife_csid_get_format(input_fmt, path_fmt); if (rc) goto error; *plain_fmt = 0; case CAM_FORMAT_DPCM_12_8_12: *decode_fmt = 0xA; *plain_fmt = 0x1; break; case CAM_FORMAT_PLAIN16_8: case CAM_FORMAT_PLAIN16_10: case CAM_FORMAT_PLAIN16_12: case CAM_FORMAT_PLAIN16_14: case CAM_FORMAT_PLAIN16_16: rc = cam_ife_csid_get_format(input_fmt, path_fmt); if (rc) goto error; *plain_fmt = 1; case CAM_FORMAT_DPCM_14_8_14: *decode_fmt = 0xB; *plain_fmt = 0x1; break; case CAM_FORMAT_PLAIN32_20: rc = cam_ife_csid_get_format(input_fmt, path_fmt); if (rc) goto error; *plain_fmt = 2; case CAM_FORMAT_DPCM_14_10_14: *decode_fmt = 0xC; *plain_fmt = 0x1; break; default: *path_fmt = 0xF; *plain_fmt = 0; break; CAM_ERR(CAM_ISP, "Unsupported format %d", in_format); rc = -EINVAL; } CAM_DBG(CAM_ISP, "path format value:%d plain format value:%d", *path_fmt, *plain_fmt); CAM_DBG(CAM_ISP, "decode_fmt:%d plain_fmt:%d", *decode_fmt, *plain_fmt); return 0; error: return rc; } static int cam_ife_csid_cid_get(struct cam_ife_csid_hw *csid_hw, struct cam_isp_resource_node **res, int32_t vc, uint32_t dt, uint32_t res_type) Loading Loading @@ -549,7 +645,7 @@ static int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw, goto end; } } else { if (csid_hw->tpg_cfg.decode_fmt != if (csid_hw->tpg_cfg.in_format != cid_reserv->in_port->format || csid_hw->tpg_cfg.width != cid_reserv->in_port->left_width || Loading Loading @@ -585,7 +681,7 @@ static int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw, rc = -EINVAL; goto end; } csid_hw->tpg_cfg.decode_fmt = csid_hw->tpg_cfg.in_format = cid_reserv->in_port->format; csid_hw->tpg_cfg.width = cid_reserv->in_port->left_width; Loading Loading @@ -712,20 +808,9 @@ static int cam_ife_csid_path_reserve(struct cam_ife_csid_hw *csid_hw, res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED; path_data = (struct cam_ife_csid_path_cfg *)res->res_priv; /* store the output format for RDI */ switch (reserve->res_id) { case CAM_IFE_PIX_PATH_RES_RDI_0: case CAM_IFE_PIX_PATH_RES_RDI_1: case CAM_IFE_PIX_PATH_RES_RDI_2: case CAM_IFE_PIX_PATH_RES_RDI_3: path_data->output_fmt = reserve->out_port->format; break; default: break; } path_data->cid = reserve->cid; path_data->decode_fmt = reserve->in_port->format; path_data->in_format = reserve->in_port->format; path_data->out_format = reserve->out_port->format; path_data->master_idx = reserve->master_idx; path_data->sync_mode = reserve->sync_mode; path_data->height = reserve->in_port->height; Loading @@ -746,9 +831,14 @@ static int cam_ife_csid_path_reserve(struct cam_ife_csid_hw *csid_hw, path_data->crop_enable = 1; path_data->start_pixel = reserve->in_port->right_start; path_data->width = reserve->in_port->right_width; } else } else { path_data->crop_enable = 0; path_data->width = reserve->in_port->left_width; path_data->start_pixel = reserve->in_port->left_start; } CAM_DBG(CAM_ISP, "Res %d width %d height %d\n", reserve->res_id, path_data->width, path_data->height); reserve->node_res = res; end: Loading Loading @@ -1027,10 +1117,10 @@ static int cam_ife_csid_config_tpg(struct cam_ife_csid_hw *csid_hw, csid_reg->tpg_reg->csid_tpg_dt_n_cfg_1_addr); /* * decode_fmt is the same as the input resource format. * in_format is the same as the input resource format. * it is one larger than the register spec format. */ val = ((csid_hw->tpg_cfg.decode_fmt - 1) << 16) | 0x8; val = ((csid_hw->tpg_cfg.in_format - 1) << 16) | 0x8; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->tpg_reg->csid_tpg_dt_n_cfg_2_addr); Loading Loading @@ -1160,7 +1250,7 @@ static int cam_ife_csid_init_config_ipp_path( struct cam_ife_csid_path_cfg *path_data; struct cam_ife_csid_reg_offset *csid_reg; struct cam_hw_soc_info *soc_info; uint32_t path_format = 0, val = 0; uint32_t decode_format = 0, plain_format = 0, val = 0; path_data = (struct cam_ife_csid_path_cfg *) res->res_priv; csid_reg = csid_hw->csid_info->csid_reg; Loading @@ -1173,8 +1263,9 @@ static int cam_ife_csid_init_config_ipp_path( return -EINVAL; } CAM_DBG(CAM_ISP, "Enabled IPP Path......."); rc = cam_ife_csid_get_format(path_data->decode_fmt, &path_format); CAM_DBG(CAM_ISP, "Config IPP Path"); rc = cam_ife_csid_get_format_ipp(path_data->in_format, &decode_format, &plain_format); if (rc) return rc; Loading @@ -1185,7 +1276,7 @@ static int cam_ife_csid_init_config_ipp_path( val = (path_data->vc << csid_reg->cmn_reg->vc_shift_val) | (path_data->dt << csid_reg->cmn_reg->dt_shift_val) | (path_data->cid << csid_reg->cmn_reg->dt_id_shift_val) | (path_format << csid_reg->cmn_reg->fmt_shift_val) | (decode_format << csid_reg->cmn_reg->fmt_shift_val) | (path_data->crop_enable & 1 << csid_reg->cmn_reg->crop_h_en_shift_val) | (path_data->crop_enable & 1 << Loading Loading @@ -1330,7 +1421,7 @@ static int cam_ife_csid_enable_ipp_path( return -EINVAL; } CAM_DBG(CAM_ISP, "enable IPP path......."); CAM_DBG(CAM_ISP, "Enable IPP path"); /* Resume at frame boundary */ if (path_data->sync_mode == CAM_ISP_HW_SYNC_MASTER) { Loading Loading @@ -1462,8 +1553,8 @@ static int cam_ife_csid_init_config_rdi_path( return -EINVAL; } rc = cam_ife_csid_get_rdi_format(path_data->decode_fmt, path_data->output_fmt, &path_format, &plain_fmt); rc = cam_ife_csid_get_format_rdi(path_data->in_format, path_data->out_format, &path_format, &plain_fmt); if (rc) return rc; Loading Loading @@ -1536,6 +1627,18 @@ static int cam_ife_csid_init_config_rdi_path( val = cam_io_r_mb(soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr); val |= (1 << csid_reg->cmn_reg->path_en_shift_val); #if MEASURE_EN val |= 0x2; cam_io_w_mb(0x3, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr); cam_io_w_mb(path_data->height << 16 | path_data->width, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg1_addr); CAM_DBG(CAM_ISP, "measure_cfg1 0x%x offset 0x%x\n", path_data->height << 16 | path_data->width, csid_reg->rdi_reg[id]->csid_rdi_format_measure_cfg0_addr); #endif cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_cfg0_addr); Loading Loading @@ -1605,7 +1708,11 @@ static int cam_ife_csid_enable_rdi_path( csid_reg->rdi_reg[id]->csid_rdi_ctrl_addr); /* Enable the required RDI interrupts */ val = CSID_PATH_INFO_RST_DONE | CSID_PATH_ERROR_FIFO_OVERFLOW; val = CSID_PATH_INFO_RST_DONE | #if MEASURE_EN CSID_PATH_INFO_INPUT_SOF | #endif CSID_PATH_ERROR_FIFO_OVERFLOW; cam_io_w_mb(val, soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[id]->csid_rdi_irq_mask_addr); Loading Loading @@ -2298,6 +2405,9 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) struct cam_ife_csid_reg_offset *csid_reg; uint32_t i, irq_status_top, irq_status_rx, irq_status_ipp = 0, irq_status_rdi[4]; #if MEASURE_EN uint32_t val; #endif csid_hw = (struct cam_ife_csid_hw *)data; Loading Loading @@ -2428,8 +2538,15 @@ irqreturn_t cam_ife_csid_irq(int irq_num, void *data) complete(&csid_hw->csid_rdin_complete[i]); } if (irq_status_rdi[i] & CSID_PATH_INFO_INPUT_SOF) if (irq_status_rdi[i] & CSID_PATH_INFO_INPUT_SOF) { CAM_DBG(CAM_ISP, "CSID RDI SOF received"); #if MEASURE_EN val = cam_io_r(soc_info->reg_map[0].mem_base + csid_reg->rdi_reg[i]-> csid_rdi_format_measure0_addr); CAM_ERR(CAM_ISP, "measure 0x%x\n", val); #endif } if (irq_status_rdi[i] & CSID_PATH_INFO_INPUT_EOF) CAM_DBG(CAM_ISP, "CSID RDI EOF received"); Loading