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Commit ea1c9de4 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'x86/urgent' into x86/cleanups

parents 4e1d112c a2bd7274

arch/x86/kernel/amd_iommu.c

+1 −1
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) 
	u8 *target;



	tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);

	target = (iommu->cmd_buf + tail);

	target = iommu->cmd_buf + tail;

	memcpy_toio(target, cmd, sizeof(*cmd));

	tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;

	head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);

arch/x86/kernel/cpu/addon_cpuid_features.c

+15 −2
Original line number Diff line number Diff line
@@ -56,9 +56,22 @@ void __cpuinit validate_pat_support(struct cpuinfo_x86 *c) 


	switch (c->x86_vendor) {

	case X86_VENDOR_INTEL:

		if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))

		/*

		 * There is a known erratum on Pentium III and Core Solo

		 * and Core Duo CPUs.

		 * " Page with PAT set to WC while associated MTRR is UC

		 *   may consolidate to UC "

		 * Because of this erratum, it is better to stick with

		 * setting WC in MTRR rather than using PAT on these CPUs.

		 *

		 * Enable PAT WC only on P4, Core 2 or later CPUs.

		 */

		if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))

			return;

		break;



		pat_disable("PAT WC disabled due to known CPU erratum.");

		return;



	case X86_VENDOR_AMD:

	case X86_VENDOR_CENTAUR:

	case X86_VENDOR_TRANSMETA:

arch/x86/kernel/cpu/cyrix.c

+0 −18
Original line number Diff line number Diff line
@@ -134,23 +134,6 @@ static void __cpuinit set_cx86_memwb(void) 
	setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);

}



static void __cpuinit set_cx86_inc(void)

{

	unsigned char ccr3;



	printk(KERN_INFO "Enable Incrementor on Cyrix/NSC processor.\n");



	ccr3 = getCx86(CX86_CCR3);

	setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */

	/* PCR1 -- Performance Control */

	/* Incrementor on, whatever that is */

	setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02);

	/* PCR0 -- Performance Control */

	/* Incrementor Margin 10 */

	setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04);

	setCx86(CX86_CCR3, ccr3);	/* disable MAPEN */

}



/*

 *	Configure later MediaGX and/or Geode processor.

 */
@@ -174,7 +157,6 @@ static void __cpuinit geode_configure(void) 


	set_cx86_memwb();

	set_cx86_reorder();

	set_cx86_inc();



	local_irq_restore(flags);

}

arch/x86/kernel/cpu/mcheck/mce_64.c

+5 −0
Original line number Diff line number Diff line
@@ -759,6 +759,7 @@ static struct sysdev_class mce_sysclass = { 
};



DEFINE_PER_CPU(struct sys_device, device_mce);

void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu) __cpuinitdata;



/* Why are there no generic functions for this? */

#define ACCESSOR(name, var, start) \
@@ -883,9 +884,13 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb, 
	case CPU_ONLINE:

	case CPU_ONLINE_FROZEN:

		mce_create_device(cpu);

		if (threshold_cpu_callback)

			threshold_cpu_callback(action, cpu);

		break;

	case CPU_DEAD:

	case CPU_DEAD_FROZEN:

		if (threshold_cpu_callback)

			threshold_cpu_callback(action, cpu);

		mce_remove_device(cpu);

		break;

	}

arch/x86/kernel/cpu/mcheck/mce_amd_64.c

+5 −13
Original line number Diff line number Diff line
@@ -628,6 +628,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank) 
	deallocate_threshold_block(cpu, bank);



free_out:

	kobject_del(b->kobj);

	kobject_put(b->kobj);

	kfree(b);

	per_cpu(threshold_banks, cpu)[bank] = NULL;
@@ -645,14 +646,11 @@ static void threshold_remove_device(unsigned int cpu) 
}



/* get notified when a cpu comes on/off */

static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,

					    unsigned long action, void *hcpu)

static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,

						     unsigned int cpu)

{

	/* cpu was unsigned int to begin with */

	unsigned int cpu = (unsigned long)hcpu;



	if (cpu >= NR_CPUS)

		goto out;

		return;



	switch (action) {

	case CPU_ONLINE:
@@ -666,14 +664,8 @@ static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb, 
	default:

		break;

	}

      out:

	return NOTIFY_OK;

}



static struct notifier_block threshold_cpu_notifier __cpuinitdata = {

	.notifier_call = threshold_cpu_callback,

};



static __init int threshold_init_device(void)

{

	unsigned lcpu = 0;
@@ -684,7 +676,7 @@ static __init int threshold_init_device(void) 
		if (err)

			return err;

	}

	register_hotcpu_notifier(&threshold_cpu_notifier);

	threshold_cpu_callback = amd_64_threshold_cpu_callback;

	return 0;

}