Loading arch/hexagon/include/asm/cache.h +3 −1 Original line number Diff line number Diff line /* * Cache definitions for the Hexagon architecture * * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * Copyright (c) 2010-2011,2014 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -25,6 +25,8 @@ #define L1_CACHE_SHIFT (5) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define ARCH_DMA_MINALIGN L1_CACHE_BYTES #define __cacheline_aligned __aligned(L1_CACHE_BYTES) #define ____cacheline_aligned __aligned(L1_CACHE_BYTES) Loading Loading
arch/hexagon/include/asm/cache.h +3 −1 Original line number Diff line number Diff line /* * Cache definitions for the Hexagon architecture * * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. * Copyright (c) 2010-2011,2014 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -25,6 +25,8 @@ #define L1_CACHE_SHIFT (5) #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define ARCH_DMA_MINALIGN L1_CACHE_BYTES #define __cacheline_aligned __aligned(L1_CACHE_BYTES) #define ____cacheline_aligned __aligned(L1_CACHE_BYTES) Loading
Richard Kuo <rkuo@codeaurora.org>Richard Kuo <rkuo@codeaurora.org>