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Commit e980f66b authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Disable FG in TWM mode for 8909w+PM660"

parents e87ff504 758918ff

Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen3.txt

+24 −0
Original line number Diff line number Diff line
@@ -179,6 +179,14 @@ First Level Node - FG Gen3 device 
		    Element 0 - Retry value for timer

		    Element 1 - Maximum value for timer



- qcom,fg-esr-timer-shutdown

	Usage:      optional

	Value type: <prop-encoded-array>

	Definition: Number of cycles between ESR pulses at/after shutdwon.This is

		    defined when TWM (traditional watch mode) is supported.

		    Element 0 - Retry value for timer

		    Element 1 - Maximum value for timer



- qcom,fg-esr-pulse-thresh-ma

	Usage:      optional

	Value type: <u32>
@@ -464,6 +472,22 @@ First Level Node - FG Gen3 device 
	Definition: A boolean property when defined uses software based

		    ESR during charging.



- qcom,fg-disable-esr-pull-dn

	Usage:      optional

	Value type: <empty>

	Definition: A boolean property which disables ESR pull-down.

		    This is to be used for debug purposes only.



- qcom,fg-sync-sleep-threshold-ma

	Usage:      optional

	Value type: <u32>

	Definition: The minimum battery current for FG to enter into sync-sleep.



- qcom,fg-disable-in-twm

	Usage:      optional

	Value type: <empty>

	Definition: A boolean property which disables FG during TWM entry.



==========================================================

Second Level Nodes - Peripherals managed by FG Gen3 driver

==========================================================

arch/arm64/boot/dts/qcom/8909w-pm660.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -559,6 +559,11 @@ 
	qcom,fg-esr-pulse-thresh-ma = <40>;

	qcom,fg-esr-meas-curr-ma = <60>;

	qcom,fg-cutoff-current = <50>;



	qcom,fg-esr-timer-shutdown = <2048 2048>;

	qcom,fg-esr-timer-asleep = <512 512>;

	qcom,fg-sync-sleep-threshold-ma = <30>;

	qcom,fg-disable-in-twm;

};



&pm660_pdphy {

drivers/power/supply/qcom/fg-core.h

+7 −0
Original line number Diff line number Diff line
@@ -190,6 +190,7 @@ enum fg_sram_param_id { 
	FG_SRAM_DELTA_MSOC_THR,

	FG_SRAM_DELTA_BSOC_THR,

	FG_SRAM_RECHARGE_SOC_THR,

	FG_SRAM_SYNC_SLEEP_THR,

	FG_SRAM_RECHARGE_VBATT_THR,

	FG_SRAM_KI_COEFF_LOW_DISCHG,

	FG_SRAM_KI_COEFF_MED_DISCHG,
@@ -282,6 +283,8 @@ struct fg_dt_props { 
	bool	linearize_soc;

	bool	auto_recharge_soc;

	bool	use_esr_sw;

	bool	disable_esr_pull_dn;

	bool	disable_fg_twm;

	int	cutoff_volt_mv;

	int	empty_volt_mv;

	int	vbatt_low_thr_mv;
@@ -296,6 +299,7 @@ struct fg_dt_props { 
	int	esr_timer_charging[NUM_ESR_TIMERS];

	int	esr_timer_awake[NUM_ESR_TIMERS];

	int	esr_timer_asleep[NUM_ESR_TIMERS];

	int	esr_timer_shutdown[NUM_ESR_TIMERS];

	int	rconn_mohms;

	int	esr_clamp_mohms;

	int	cl_start_soc;
@@ -318,6 +322,7 @@ struct fg_dt_props { 
	int	slope_limit_temp;

	int	esr_pulse_thresh_ma;

	int	esr_meas_curr_ma;

	int	sync_sleep_threshold_ma;

	int	bmd_en_delay_ms;

	int	ki_coeff_full_soc_dischg;

	int	ki_coeff_hi_chg;
@@ -448,6 +453,7 @@ struct fg_chip { 
	struct fg_batt_props	bp;

	struct fg_cyc_ctr_data	cyc_ctr;

	struct notifier_block	nb;

	struct notifier_block	twm_nb;

	struct fg_cap_learning  cl;

	struct alarm            esr_sw_timer;

	struct ttf		ttf;
@@ -496,6 +502,7 @@ struct fg_chip { 
	bool			slope_limit_en;

	bool			use_ima_single_mode;

	bool			usb_present;

	bool			twm_state;

	bool			use_dma;

	bool			qnovo_enable;

	bool			suspended;

drivers/power/supply/qcom/fg-reg.h

+7 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -29,6 +29,7 @@ 
#define BATT_SOC_STS_CLR(chip)			(chip->batt_soc_base + 0x4A)

#define BATT_SOC_LOW_PWR_CFG(chip)		(chip->batt_soc_base + 0x52)

#define BATT_SOC_LOW_PWR_STS(chip)		(chip->batt_soc_base + 0x56)

#define BATT_SOC_RST_CTRL0(chip)		(chip->batt_soc_base + 0xBA)



/* BATT_SOC_INT_RT_STS */

#define SOC_READY_BIT				BIT(1)
@@ -40,6 +41,11 @@ 
/* BATT_SOC_RESTART */

#define RESTART_GO_BIT				BIT(0)



/* BATT_SOC_RST_CTRL0 */

#define BCL_RST_BIT				BIT(2)

#define MEM_RST_BIT				BIT(1)

#define ALG_RST_BIT				BIT(0)



/* FG_BATT_INFO register definitions */

#define BATT_INFO_BATT_TEMP_STS(chip)		(chip->batt_info_base + 0x06)

#define BATT_INFO_SYS_BATT(chip)		(chip->batt_info_base + 0x07)

drivers/power/supply/qcom/fg-util.c

+1 −1
Original line number Diff line number Diff line
@@ -471,7 +471,7 @@ int fg_masked_write(struct fg_chip *chip, int addr, u8 mask, u8 val) 
		return -ENXIO;



	mutex_lock(&chip->bus_lock);

	sec_access = (addr & 0x00FF) > 0xD0;

	sec_access = (addr & 0x00FF) > 0xB8;

	if (sec_access) {

		rc = regmap_write(chip->regmap, (addr & 0xFF00) | 0xD0, 0xA5);

		if (rc < 0) {