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Commit e9577f4b authored by AnilKumar Chimata's avatar AnilKumar Chimata
Browse files

ARM: dts: msm: Enable QSEECOM driver for sdm845 



Enable qseecom driver node on device tree include file to
enable the qseecom driver to communicate with TZ.

Change-Id: I81b5d9edfc3c9ff069b1c9c932ea35af0771d15b
Signed-off-by: default avatarAnilKumar Chimata <anilc@codeaurora.org>
parent 81ddaa7e

arch/arm64/boot/dts/qcom/sdm845.dtsi

+28 −0
Original line number Diff line number Diff line
@@ -1944,6 +1944,34 @@ 
		qcom,pipe-attr-ee;

	};



	qcom_seecom: qseecom@86d00000 {

		compatible = "qcom,qseecom";

		reg = <0x86d00000 0x2200000>;

		reg-names = "secapp-region";

		qcom,hlos-num-ce-hw-instances = <1>;

		qcom,hlos-ce-hw-instance = <0>;

		qcom,qsee-ce-hw-instance = <0>;

		qcom,disk-encrypt-pipe-pair = <2>;

		qcom,support-fde;

		qcom,no-clock-support;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<125 512 0 0>,

			<125 512 200000 400000>,

			<125 512 300000 800000>,

			<125 512 400000 1000000>;

		clock-names = "core_clk_src", "core_clk",

				"iface_clk", "bus_clk";

		clocks = <&clock_gcc GCC_CE1_CLK>,

			 <&clock_gcc GCC_CE1_CLK>,

			 <&clock_gcc GCC_CE1_AHB_CLK>,

			 <&clock_gcc GCC_CE1_AXI_CLK>;

		qcom,ce-opp-freq = <171430000>;

		qcom,qsee-reentrancy-support = <2>;

	};



	qcom,msm_gsi {

		compatible = "qcom,msm_gsi";

	};