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Commit e923090d authored by Albert Lee's avatar Albert Lee Committed by Jeff Garzik
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libata: pata_pdc2027x PLL detection minor cleanup 



Minor cleanup to remove the unneeded rmb()s per Jeff's advice. Also removed the
pll_clock < 0 check since pll_clock now guaranteed to be >= 0 after Mikael's patch.

Signed-off-by: default avatarAlbert Lee <albertcc@tw.ibm.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent c7293870

drivers/ata/pata_pdc2027x.c

+0 −5
Original line number Diff line number Diff line
@@ -561,12 +561,10 @@ static long pdc_read_counter(struct ata_host *host) 
retry:

	bccrl = readl(mmio_base + PDC_BYTE_COUNT) & 0x7fff;

	bccrh = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;

	rmb();



	/* Read the counter values again for verification */

	bccrlv = readl(mmio_base + PDC_BYTE_COUNT) & 0x7fff;

	bccrhv = readl(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff;

	rmb();



	counter = (bccrh << 15) | bccrl;
@@ -741,9 +739,6 @@ static int pdc_hardware_init(struct ata_host *host, unsigned int board_idx) 
	 */

	pll_clock = pdc_detect_pll_input_clock(host);



	if (pll_clock < 0) /* counter overflow? Try again. */

		pll_clock = pdc_detect_pll_input_clock(host);



	dev_printk(KERN_INFO, host->dev, "PLL input clock %ld kHz\n", pll_clock/1000);



	/* Adjust PLL control register */