Commit e92293a2 authored Nov 21, 2014 by Thomas Petazzoni Committed by Jason Cooper Nov 22, 2014

Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller



The suspend/resume code for Armada XP has to modify certain registers
of the SDRAM controller. Therefore, we need to define a Device Tree
binding for this hardware block.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: devicetree@vger.kernel.org
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-2-git-send-email-thomas.petazzoni@free-electrons.com


Signed-off-by: Jason Cooper <jason@lakedaemon.net>

parent f114040e

Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt

0 → 100644

+21 −0

Original line number	Diff line number	Diff line
		Device Tree bindings for MVEBU SDRAM controllers

		The Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller
		differs from one SoC variant to another, but they also share a number
		of commonalities.

		For now, this Device Tree binding documentation only documents the
		Armada XP SDRAM controller.

		Required properties:

		- compatible: for Armada XP, "marvell,armada-xp-sdram-controller"
		- reg: a resource specifier for the register space, which should
		include all SDRAM controller registers as per the datasheet.

		Example:

		sdramc@1400 {
		compatible = "marvell,armada-xp-sdram-controller";
		reg = <0x1400 0x500>;
		};