ixgbe: Make return values more direct (e90dd264) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c

+43 −68

Original line number	Original line	Diff line number	Diff line
	@@ -122,7 +122,7 @@ static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)
	{		{
	struct ixgbe_mac_info *mac = &hw->mac;		struct ixgbe_mac_info *mac = &hw->mac;
	struct ixgbe_phy_info *phy = &hw->phy;		struct ixgbe_phy_info *phy = &hw->phy;
	s32 ret_val = 0;		s32 ret_val;
	u16 list_offset, data_offset;		u16 list_offset, data_offset;

	/* Identify the PHY */		/* Identify the PHY */
	@@ -147,28 +147,23 @@ static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)

	/* Call SFP+ identify routine to get the SFP+ module type */		/* Call SFP+ identify routine to get the SFP+ module type */
	ret_val = phy->ops.identify_sfp(hw);		ret_val = phy->ops.identify_sfp(hw);
	if (ret_val != 0)		if (ret_val)
	goto out;		return ret_val;
	else if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) {		if (hw->phy.sfp_type == ixgbe_sfp_type_unknown)
	ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED;		return IXGBE_ERR_SFP_NOT_SUPPORTED;
	goto out;
	}

	/* Check to see if SFP+ module is supported */		/* Check to see if SFP+ module is supported */
	ret_val = ixgbe_get_sfp_init_sequence_offsets(hw,		ret_val = ixgbe_get_sfp_init_sequence_offsets(hw,
	&list_offset,		&list_offset,
	&data_offset);		&data_offset);
	if (ret_val != 0) {		if (ret_val)
	ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED;		return IXGBE_ERR_SFP_NOT_SUPPORTED;
	goto out;
	}
	break;		break;
	default:		default:
	break;		break;
	}		}

	out:		return 0;
	return ret_val;
	}		}

	/**		/**
	@@ -183,7 +178,7 @@ static s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
	{		{
	u32 regval;		u32 regval;
	u32 i;		u32 i;
	s32 ret_val = 0;		s32 ret_val;

	ret_val = ixgbe_start_hw_generic(hw);		ret_val = ixgbe_start_hw_generic(hw);

	@@ -203,11 +198,13 @@ static s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
	IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);		IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
	}		}

			if (ret_val)
			return ret_val;

	/* set the completion timeout for interface */		/* set the completion timeout for interface */
	if (ret_val == 0)
	ixgbe_set_pcie_completion_timeout(hw);		ixgbe_set_pcie_completion_timeout(hw);

	return ret_val;		return 0;
	}		}

	/**		/**
	@@ -222,7 +219,6 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
	ixgbe_link_speed *speed,		ixgbe_link_speed *speed,
	bool *autoneg)		bool *autoneg)
	{		{
	s32 status = 0;
	u32 autoc = 0;		u32 autoc = 0;

	/*		/*
	@@ -262,11 +258,10 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
	break;		break;

	default:		default:
	status = IXGBE_ERR_LINK_SETUP;		return IXGBE_ERR_LINK_SETUP;
	break;
	}		}

	return status;		return 0;
	}		}

	/**		/**
	@@ -277,14 +272,12 @@ static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
	**/		**/
	static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)		static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
	{		{
	enum ixgbe_media_type media_type;

	/* Detect if there is a copper PHY attached. */		/* Detect if there is a copper PHY attached. */
	switch (hw->phy.type) {		switch (hw->phy.type) {
	case ixgbe_phy_cu_unknown:		case ixgbe_phy_cu_unknown:
	case ixgbe_phy_tn:		case ixgbe_phy_tn:
	media_type = ixgbe_media_type_copper;		return ixgbe_media_type_copper;
	goto out;
	default:		default:
	break;		break;
	}		}
	@@ -294,30 +287,27 @@ static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
	case IXGBE_DEV_ID_82598:		case IXGBE_DEV_ID_82598:
	case IXGBE_DEV_ID_82598_BX:		case IXGBE_DEV_ID_82598_BX:
	/* Default device ID is mezzanine card KX/KX4 */		/* Default device ID is mezzanine card KX/KX4 */
	media_type = ixgbe_media_type_backplane;		return ixgbe_media_type_backplane;
	break;
	case IXGBE_DEV_ID_82598AF_DUAL_PORT:		case IXGBE_DEV_ID_82598AF_DUAL_PORT:
	case IXGBE_DEV_ID_82598AF_SINGLE_PORT:		case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
	case IXGBE_DEV_ID_82598_DA_DUAL_PORT:		case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
	case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:		case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
	case IXGBE_DEV_ID_82598EB_XF_LR:		case IXGBE_DEV_ID_82598EB_XF_LR:
	case IXGBE_DEV_ID_82598EB_SFP_LOM:		case IXGBE_DEV_ID_82598EB_SFP_LOM:
	media_type = ixgbe_media_type_fiber;		return ixgbe_media_type_fiber;
	break;
	case IXGBE_DEV_ID_82598EB_CX4:		case IXGBE_DEV_ID_82598EB_CX4:
	case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:		case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
	media_type = ixgbe_media_type_cx4;		return ixgbe_media_type_cx4;
	break;
	case IXGBE_DEV_ID_82598AT:		case IXGBE_DEV_ID_82598AT:
	case IXGBE_DEV_ID_82598AT2:		case IXGBE_DEV_ID_82598AT2:
	media_type = ixgbe_media_type_copper;		return ixgbe_media_type_copper;
	break;
	default:		default:
	media_type = ixgbe_media_type_unknown;		return ixgbe_media_type_unknown;
	break;
	}		}
	out:
	return media_type;
	}		}

	/**		/**
	@@ -328,7 +318,6 @@ static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
	**/		**/
	static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)		static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
	{		{
	s32 ret_val = 0;
	u32 fctrl_reg;		u32 fctrl_reg;
	u32 rmcs_reg;		u32 rmcs_reg;
	u32 reg;		u32 reg;
	@@ -338,10 +327,8 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
	bool link_up;		bool link_up;

	/* Validate the water mark configuration */		/* Validate the water mark configuration */
	if (!hw->fc.pause_time) {		if (!hw->fc.pause_time)
	ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;		return IXGBE_ERR_INVALID_LINK_SETTINGS;
	goto out;
	}

	/* Low water mark of zero causes XOFF floods */		/* Low water mark of zero causes XOFF floods */
	for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {		for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
	@@ -350,8 +337,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
	if (!hw->fc.low_water[i] \|\|		if (!hw->fc.low_water[i] \|\|
	hw->fc.low_water[i] >= hw->fc.high_water[i]) {		hw->fc.low_water[i] >= hw->fc.high_water[i]) {
	hw_dbg(hw, "Invalid water mark configuration\n");		hw_dbg(hw, "Invalid water mark configuration\n");
	ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;		return IXGBE_ERR_INVALID_LINK_SETTINGS;
	goto out;
	}		}
	}		}
	}		}
	@@ -428,8 +414,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
	break;		break;
	default:		default:
	hw_dbg(hw, "Flow control param set incorrectly\n");		hw_dbg(hw, "Flow control param set incorrectly\n");
	ret_val = IXGBE_ERR_CONFIG;		return IXGBE_ERR_CONFIG;
	goto out;
	}		}

	/* Set 802.3x based flow control settings. */		/* Set 802.3x based flow control settings. */
	@@ -460,8 +445,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)
	/* Configure flow control refresh threshold value */		/* Configure flow control refresh threshold value */
	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);		IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);

	out:		return 0;
	return ret_val;
	}		}

	/**		/**
	@@ -597,7 +581,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
	}		}

	if (!*link_up)		if (!*link_up)
	goto out;		return 0;
	}		}

	links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);		links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
	@@ -628,7 +612,6 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
	(ixgbe_validate_link_ready(hw) != 0))		(ixgbe_validate_link_ready(hw) != 0))
	*link_up = false;		*link_up = false;

	out:
	return 0;		return 0;
	}		}

	@@ -645,7 +628,6 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
	bool autoneg_wait_to_complete)		bool autoneg_wait_to_complete)
	{		{
	bool autoneg = false;		bool autoneg = false;
	s32 status = 0;
	ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN;		ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN;
	u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);		u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
	u32 autoc = curr_autoc;		u32 autoc = curr_autoc;
	@@ -656,7 +638,7 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
	speed &= link_capabilities;		speed &= link_capabilities;

	if (speed == IXGBE_LINK_SPEED_UNKNOWN)		if (speed == IXGBE_LINK_SPEED_UNKNOWN)
	status = IXGBE_ERR_LINK_SETUP;		return IXGBE_ERR_LINK_SETUP;

	/* Set KX4/KX support according to speed requested */		/* Set KX4/KX support according to speed requested */
	else if (link_mode == IXGBE_AUTOC_LMS_KX4_AN \|\|		else if (link_mode == IXGBE_AUTOC_LMS_KX4_AN \|\|
	@@ -670,17 +652,11 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
	IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);		IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
	}		}

	if (status == 0) {		/* Setup and restart the link based on the new values in
	/*
	* Setup and restart the link based on the new values in
	* ixgbe_hw This will write the AUTOC register based on the new		* ixgbe_hw This will write the AUTOC register based on the new
	* stored values		* stored values
	*/		*/
	status = ixgbe_start_mac_link_82598(hw,		return ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete);
	autoneg_wait_to_complete);
	}

	return status;
	}		}


	@@ -717,7 +693,7 @@ static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
	**/		**/
	static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)		static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
	{		{
	s32 status = 0;		s32 status;
	s32 phy_status = 0;		s32 phy_status = 0;
	u32 ctrl;		u32 ctrl;
	u32 gheccr;		u32 gheccr;
	@@ -727,8 +703,8 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)

	/* Call adapter stop to disable tx/rx and clear interrupts */		/* Call adapter stop to disable tx/rx and clear interrupts */
	status = hw->mac.ops.stop_adapter(hw);		status = hw->mac.ops.stop_adapter(hw);
	if (status != 0)		if (status)
	goto reset_hw_out;		return status;

	/*		/*
	* Power up the Atlas Tx lanes if they are currently powered down.		* Power up the Atlas Tx lanes if they are currently powered down.
	@@ -770,7 +746,7 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
	/* Init PHY and function pointers, perform SFP setup */		/* Init PHY and function pointers, perform SFP setup */
	phy_status = hw->phy.ops.init(hw);		phy_status = hw->phy.ops.init(hw);
	if (phy_status == IXGBE_ERR_SFP_NOT_SUPPORTED)		if (phy_status == IXGBE_ERR_SFP_NOT_SUPPORTED)
	goto reset_hw_out;		return phy_status;
	if (phy_status == IXGBE_ERR_SFP_NOT_PRESENT)		if (phy_status == IXGBE_ERR_SFP_NOT_PRESENT)
	goto mac_reset_top;		goto mac_reset_top;

	@@ -836,7 +812,6 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
	*/		*/
	hw->mac.ops.init_rx_addrs(hw);		hw->mac.ops.init_rx_addrs(hw);

	reset_hw_out:
	if (phy_status)		if (phy_status)
	status = phy_status;		status = phy_status;

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

+74 −110

Original line number	Original line	Diff line number	Diff line
	@@ -123,7 +123,7 @@ static void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw)

	static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)		static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
	{		{
	s32 ret_val = 0;		s32 ret_val;
	u16 list_offset, data_offset, data_value;		u16 list_offset, data_offset, data_value;

	if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) {		if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) {
	@@ -133,16 +133,14 @@ static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)

	ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,		ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,
	&data_offset);		&data_offset);
	if (ret_val != 0)		if (ret_val)
	goto setup_sfp_out;		return ret_val;

	/* PHY config will finish before releasing the semaphore */		/* PHY config will finish before releasing the semaphore */
	ret_val = hw->mac.ops.acquire_swfw_sync(hw,		ret_val = hw->mac.ops.acquire_swfw_sync(hw,
	IXGBE_GSSR_MAC_CSR_SM);		IXGBE_GSSR_MAC_CSR_SM);
	if (ret_val != 0) {		if (ret_val)
	ret_val = IXGBE_ERR_SWFW_SYNC;		return IXGBE_ERR_SWFW_SYNC;
	goto setup_sfp_out;
	}

	if (hw->eeprom.ops.read(hw, ++data_offset, &data_value))		if (hw->eeprom.ops.read(hw, ++data_offset, &data_value))
	goto setup_sfp_err;		goto setup_sfp_err;
	@@ -169,13 +167,11 @@ static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)

	if (ret_val) {		if (ret_val) {
	hw_dbg(hw, " sfp module setup not complete\n");		hw_dbg(hw, " sfp module setup not complete\n");
	ret_val = IXGBE_ERR_SFP_SETUP_NOT_COMPLETE;		return IXGBE_ERR_SFP_SETUP_NOT_COMPLETE;
	goto setup_sfp_out;
	}		}
	}		}

	setup_sfp_out:		return 0;
	return ret_val;

	setup_sfp_err:		setup_sfp_err:
	/* Release the semaphore */		/* Release the semaphore */
	@@ -294,7 +290,7 @@ static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
	{		{
	struct ixgbe_mac_info *mac = &hw->mac;		struct ixgbe_mac_info *mac = &hw->mac;
	struct ixgbe_phy_info *phy = &hw->phy;		struct ixgbe_phy_info *phy = &hw->phy;
	s32 ret_val = 0;		s32 ret_val;
	u32 esdp;		u32 esdp;

	if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) {		if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) {
	@@ -355,7 +351,6 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
	ixgbe_link_speed *speed,		ixgbe_link_speed *speed,
	bool *autoneg)		bool *autoneg)
	{		{
	s32 status = 0;
	u32 autoc = 0;		u32 autoc = 0;

	/* Determine 1G link capabilities off of SFP+ type */		/* Determine 1G link capabilities off of SFP+ type */
	@@ -367,7 +362,7 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
	hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) {		hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) {
	*speed = IXGBE_LINK_SPEED_1GB_FULL;		*speed = IXGBE_LINK_SPEED_1GB_FULL;
	*autoneg = true;		*autoneg = true;
	goto out;		return 0;
	}		}

	/*		/*
	@@ -430,8 +425,7 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
	break;		break;

	default:		default:
	status = IXGBE_ERR_LINK_SETUP;		return IXGBE_ERR_LINK_SETUP;
	goto out;
	}		}

	if (hw->phy.multispeed_fiber) {		if (hw->phy.multispeed_fiber) {
	@@ -445,8 +439,7 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
	*autoneg = true;		*autoneg = true;
	}		}

	out:		return 0;
	return status;
	}		}

	/**		/**
	@@ -457,14 +450,12 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
	**/		**/
	static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)		static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)
	{		{
	enum ixgbe_media_type media_type;

	/* Detect if there is a copper PHY attached. */		/* Detect if there is a copper PHY attached. */
	switch (hw->phy.type) {		switch (hw->phy.type) {
	case ixgbe_phy_cu_unknown:		case ixgbe_phy_cu_unknown:
	case ixgbe_phy_tn:		case ixgbe_phy_tn:
	media_type = ixgbe_media_type_copper;		return ixgbe_media_type_copper;
	goto out;
	default:		default:
	break;		break;
	}		}
	@@ -477,34 +468,31 @@ static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)
	case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:		case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
	case IXGBE_DEV_ID_82599_XAUI_LOM:		case IXGBE_DEV_ID_82599_XAUI_LOM:
	/* Default device ID is mezzanine card KX/KX4 */		/* Default device ID is mezzanine card KX/KX4 */
	media_type = ixgbe_media_type_backplane;		return ixgbe_media_type_backplane;
	break;
	case IXGBE_DEV_ID_82599_SFP:		case IXGBE_DEV_ID_82599_SFP:
	case IXGBE_DEV_ID_82599_SFP_FCOE:		case IXGBE_DEV_ID_82599_SFP_FCOE:
	case IXGBE_DEV_ID_82599_SFP_EM:		case IXGBE_DEV_ID_82599_SFP_EM:
	case IXGBE_DEV_ID_82599_SFP_SF2:		case IXGBE_DEV_ID_82599_SFP_SF2:
	case IXGBE_DEV_ID_82599_SFP_SF_QP:		case IXGBE_DEV_ID_82599_SFP_SF_QP:
	case IXGBE_DEV_ID_82599EN_SFP:		case IXGBE_DEV_ID_82599EN_SFP:
	media_type = ixgbe_media_type_fiber;		return ixgbe_media_type_fiber;
	break;
	case IXGBE_DEV_ID_82599_CX4:		case IXGBE_DEV_ID_82599_CX4:
	media_type = ixgbe_media_type_cx4;		return ixgbe_media_type_cx4;
	break;
	case IXGBE_DEV_ID_82599_T3_LOM:		case IXGBE_DEV_ID_82599_T3_LOM:
	media_type = ixgbe_media_type_copper;		return ixgbe_media_type_copper;
	break;
	case IXGBE_DEV_ID_82599_LS:		case IXGBE_DEV_ID_82599_LS:
	media_type = ixgbe_media_type_fiber_lco;		return ixgbe_media_type_fiber_lco;
	break;
	case IXGBE_DEV_ID_82599_QSFP_SF_QP:		case IXGBE_DEV_ID_82599_QSFP_SF_QP:
	media_type = ixgbe_media_type_fiber_qsfp;		return ixgbe_media_type_fiber_qsfp;
	break;
	default:		default:
	media_type = ixgbe_media_type_unknown;		return ixgbe_media_type_unknown;
	break;
	}		}
	out:
	return media_type;
	}		}

	/**		/**
	@@ -554,7 +542,7 @@ static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
	status = hw->mac.ops.acquire_swfw_sync(hw,		status = hw->mac.ops.acquire_swfw_sync(hw,
	IXGBE_GSSR_MAC_CSR_SM);		IXGBE_GSSR_MAC_CSR_SM);
	if (status)		if (status)
	goto out;		return status;

	got_lock = true;		got_lock = true;
	}		}
	@@ -591,7 +579,6 @@ static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
	/* Add delay to filter out noises during initial link setup */		/* Add delay to filter out noises during initial link setup */
	msleep(50);		msleep(50);

	out:
	return status;		return status;
	}		}

	@@ -958,7 +945,7 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
	bool autoneg_wait_to_complete)		bool autoneg_wait_to_complete)
	{		{
	bool autoneg = false;		bool autoneg = false;
	s32 status = 0;		s32 status;
	u32 pma_pmd_1g, link_mode, links_reg, i;		u32 pma_pmd_1g, link_mode, links_reg, i;
	u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);		u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
	u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;		u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
	@@ -974,15 +961,13 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
	/* Check to see if speed passed in is supported. */		/* Check to see if speed passed in is supported. */
	status = hw->mac.ops.get_link_capabilities(hw, &link_capabilities,		status = hw->mac.ops.get_link_capabilities(hw, &link_capabilities,
	&autoneg);		&autoneg);
	if (status != 0)		if (status)
	goto out;		return status;

	speed &= link_capabilities;		speed &= link_capabilities;

	if (speed == IXGBE_LINK_SPEED_UNKNOWN) {		if (speed == IXGBE_LINK_SPEED_UNKNOWN)
	status = IXGBE_ERR_LINK_SETUP;		return IXGBE_ERR_LINK_SETUP;
	goto out;
	}

	/* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/		/* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/
	if (hw->mac.orig_link_settings_stored)		if (hw->mac.orig_link_settings_stored)
	@@ -1033,7 +1018,7 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
	/* Restart link */		/* Restart link */
	status = hw->mac.ops.prot_autoc_write(hw, autoc, false);		status = hw->mac.ops.prot_autoc_write(hw, autoc, false);
	if (status)		if (status)
	goto out;		return status;

	/* Only poll for autoneg to complete if specified to do so */		/* Only poll for autoneg to complete if specified to do so */
	if (autoneg_wait_to_complete) {		if (autoneg_wait_to_complete) {
	@@ -1060,7 +1045,6 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
	msleep(50);		msleep(50);
	}		}

	out:
	return status;		return status;
	}		}

	@@ -1105,8 +1089,8 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)

	/* Call adapter stop to disable tx/rx and clear interrupts */		/* Call adapter stop to disable tx/rx and clear interrupts */
	status = hw->mac.ops.stop_adapter(hw);		status = hw->mac.ops.stop_adapter(hw);
	if (status != 0)		if (status)
	goto reset_hw_out;		return status;

	/* flush pending Tx transactions */		/* flush pending Tx transactions */
	ixgbe_clear_tx_pending(hw);		ixgbe_clear_tx_pending(hw);
	@@ -1117,7 +1101,7 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
	status = hw->phy.ops.init(hw);		status = hw->phy.ops.init(hw);

	if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)		if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
	goto reset_hw_out;		return status;

	/* Setup SFP module if there is one present. */		/* Setup SFP module if there is one present. */
	if (hw->phy.sfp_setup_needed) {		if (hw->phy.sfp_setup_needed) {
	@@ -1126,7 +1110,7 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
	}		}

	if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)		if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
	goto reset_hw_out;		return status;

	/* Reset PHY */		/* Reset PHY */
	if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL)		if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL)
	@@ -1216,7 +1200,7 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
	hw->mac.orig_autoc,		hw->mac.orig_autoc,
	false);		false);
	if (status)		if (status)
	goto reset_hw_out;		return status;
	}		}

	if ((autoc2 & IXGBE_AUTOC2_UPPER_MASK) !=		if ((autoc2 & IXGBE_AUTOC2_UPPER_MASK) !=
	@@ -1258,7 +1242,6 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
	hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,		hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,
	&hw->mac.wwpn_prefix);		&hw->mac.wwpn_prefix);

	reset_hw_out:
	return status;		return status;
	}		}

	@@ -1927,20 +1910,20 @@ static s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw)
	s32 ret_val = 0;		s32 ret_val = 0;

	ret_val = ixgbe_start_hw_generic(hw);		ret_val = ixgbe_start_hw_generic(hw);
	if (ret_val != 0)		if (ret_val)
	goto out;		return ret_val;

	ret_val = ixgbe_start_hw_gen2(hw);		ret_val = ixgbe_start_hw_gen2(hw);
	if (ret_val != 0)		if (ret_val)
	goto out;		return ret_val;

	/* We need to run link autotry after the driver loads */		/* We need to run link autotry after the driver loads */
	hw->mac.autotry_restart = true;		hw->mac.autotry_restart = true;

	if (ret_val == 0)		if (ret_val)
	ret_val = ixgbe_verify_fw_version_82599(hw);
	out:
	return ret_val;		return ret_val;

			return ixgbe_verify_fw_version_82599(hw);
	}		}

	/**		/**
	@@ -1953,15 +1936,14 @@ static s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw)
	**/		**/
	static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)		static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)
	{		{
	s32 status = IXGBE_ERR_PHY_ADDR_INVALID;		s32 status;

	/* Detect PHY if not unknown - returns success if already detected. */		/* Detect PHY if not unknown - returns success if already detected. */
	status = ixgbe_identify_phy_generic(hw);		status = ixgbe_identify_phy_generic(hw);
	if (status != 0) {		if (status) {
	/* 82599 10GBASE-T requires an external PHY */		/* 82599 10GBASE-T requires an external PHY */
	if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper)		if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper)
	goto out;		return status;
	else
	status = ixgbe_identify_module_generic(hw);		status = ixgbe_identify_module_generic(hw);
	}		}

	@@ -1973,9 +1955,8 @@ static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)

	/* Return error if SFP module has been detected but is not supported */		/* Return error if SFP module has been detected but is not supported */
	if (hw->phy.type == ixgbe_phy_sfp_unsupported)		if (hw->phy.type == ixgbe_phy_sfp_unsupported)
	status = IXGBE_ERR_SFP_NOT_SUPPORTED;		return IXGBE_ERR_SFP_NOT_SUPPORTED;

	out:
	return status;		return status;
	}		}

	@@ -2021,26 +2002,24 @@ static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
	u16 fw_version = 0;		u16 fw_version = 0;

	/* firmware check is only necessary for SFI devices */		/* firmware check is only necessary for SFI devices */
	if (hw->phy.media_type != ixgbe_media_type_fiber) {		if (hw->phy.media_type != ixgbe_media_type_fiber)
	status = 0;		return 0;
	goto fw_version_out;
	}

	/* get the offset to the Firmware Module block */		/* get the offset to the Firmware Module block */
	offset = IXGBE_FW_PTR;		offset = IXGBE_FW_PTR;
	if (hw->eeprom.ops.read(hw, offset, &fw_offset))		if (hw->eeprom.ops.read(hw, offset, &fw_offset))
	goto fw_version_err;		goto fw_version_err;

	if ((fw_offset == 0) \|\| (fw_offset == 0xFFFF))		if (fw_offset == 0 \|\| fw_offset == 0xFFFF)
	goto fw_version_out;		return IXGBE_ERR_EEPROM_VERSION;

	/* get the offset to the Pass Through Patch Configuration block */		/* get the offset to the Pass Through Patch Configuration block */
	offset = fw_offset + IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR;		offset = fw_offset + IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR;
	if (hw->eeprom.ops.read(hw, offset, &fw_ptp_cfg_offset))		if (hw->eeprom.ops.read(hw, offset, &fw_ptp_cfg_offset))
	goto fw_version_err;		goto fw_version_err;

	if ((fw_ptp_cfg_offset == 0) \|\| (fw_ptp_cfg_offset == 0xFFFF))		if (fw_ptp_cfg_offset == 0 \|\| fw_ptp_cfg_offset == 0xFFFF)
	goto fw_version_out;		return IXGBE_ERR_EEPROM_VERSION;

	/* get the firmware version */		/* get the firmware version */
	offset = fw_ptp_cfg_offset + IXGBE_FW_PATCH_VERSION_4;		offset = fw_ptp_cfg_offset + IXGBE_FW_PATCH_VERSION_4;
	@@ -2050,7 +2029,6 @@ static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
	if (fw_version > 0x5)		if (fw_version > 0x5)
	status = 0;		status = 0;

	fw_version_out:
	return status;		return status;

	fw_version_err:		fw_version_err:
	@@ -2067,37 +2045,33 @@ static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)
	**/		**/
	static bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)		static bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)
	{		{
	bool lesm_enabled = false;
	u16 fw_offset, fw_lesm_param_offset, fw_lesm_state;		u16 fw_offset, fw_lesm_param_offset, fw_lesm_state;
	s32 status;		s32 status;

	/* get the offset to the Firmware Module block */		/* get the offset to the Firmware Module block */
	status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset);		status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset);

	if ((status != 0) \|\|		if (status \|\| fw_offset == 0 \|\| fw_offset == 0xFFFF)
	(fw_offset == 0) \|\| (fw_offset == 0xFFFF))		return false;
	goto out;

	/* get the offset to the LESM Parameters block */		/* get the offset to the LESM Parameters block */
	status = hw->eeprom.ops.read(hw, (fw_offset +		status = hw->eeprom.ops.read(hw, (fw_offset +
	IXGBE_FW_LESM_PARAMETERS_PTR),		IXGBE_FW_LESM_PARAMETERS_PTR),
	&fw_lesm_param_offset);		&fw_lesm_param_offset);

	if ((status != 0) \|\|		if (status \|\|
	(fw_lesm_param_offset == 0) \|\| (fw_lesm_param_offset == 0xFFFF))		fw_lesm_param_offset == 0 \|\| fw_lesm_param_offset == 0xFFFF)
	goto out;		return false;

	/* get the lesm state word */		/* get the lesm state word */
	status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset +		status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset +
	IXGBE_FW_LESM_STATE_1),		IXGBE_FW_LESM_STATE_1),
	&fw_lesm_state);		&fw_lesm_state);

	if ((status == 0) &&		if (!status && (fw_lesm_state & IXGBE_FW_LESM_STATE_ENABLED))
	(fw_lesm_state & IXGBE_FW_LESM_STATE_ENABLED))		return true;
	lesm_enabled = true;

	out:		return false;
	return lesm_enabled;
	}		}

	/**		/**
	@@ -2115,22 +2089,16 @@ static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,
	u16 words, u16 *data)		u16 words, u16 *data)
	{		{
	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;		struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
	s32 ret_val = IXGBE_ERR_CONFIG;

	/*		/* If EEPROM is detected and can be addressed using 14 bits,
	* If EEPROM is detected and can be addressed using 14 bits,
	* use EERD otherwise use bit bang		* use EERD otherwise use bit bang
	*/		*/
	if ((eeprom->type == ixgbe_eeprom_spi) &&		if (eeprom->type == ixgbe_eeprom_spi &&
	(offset + (words - 1) <= IXGBE_EERD_MAX_ADDR))		offset + (words - 1) <= IXGBE_EERD_MAX_ADDR)
	ret_val = ixgbe_read_eerd_buffer_generic(hw, offset, words,		return ixgbe_read_eerd_buffer_generic(hw, offset, words, data);
	data);
	else
	ret_val = ixgbe_read_eeprom_buffer_bit_bang_generic(hw, offset,
	words,
	data);

	return ret_val;		return ixgbe_read_eeprom_buffer_bit_bang_generic(hw, offset, words,
			data);
	}		}

	/**		/**
	@@ -2147,19 +2115,15 @@ static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,
	u16 offset, u16 *data)		u16 offset, u16 *data)
	{		{
	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;		struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
	s32 ret_val = IXGBE_ERR_CONFIG;

	/*		/*
	* If EEPROM is detected and can be addressed using 14 bits,		* If EEPROM is detected and can be addressed using 14 bits,
	* use EERD otherwise use bit bang		* use EERD otherwise use bit bang
	*/		*/
	if ((eeprom->type == ixgbe_eeprom_spi) &&		if (eeprom->type == ixgbe_eeprom_spi && offset <= IXGBE_EERD_MAX_ADDR)
	(offset <= IXGBE_EERD_MAX_ADDR))		return ixgbe_read_eerd_generic(hw, offset, data);
	ret_val = ixgbe_read_eerd_generic(hw, offset, data);
	else
	ret_val = ixgbe_read_eeprom_bit_bang_generic(hw, offset, data);

	return ret_val;		return ixgbe_read_eeprom_bit_bang_generic(hw, offset, data);
	}		}

	/**		/**