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Commit e8f2b1d6 authored by Avi Kivity's avatar Avi Kivity
Browse files

KVM: x86 emulator: simplify emulate_1op_rax_rdx() 



emulate_1op_rax_rdx() is always called with the same parameters.  Simplify
by passing just the emulation context.

Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
parent 9fef72ce

arch/x86/kvm/emulate.c

+17 −25
Original line number Diff line number Diff line
@@ -322,9 +322,11 @@ struct gprefix { 
		}							\

	} while (0)



#define __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, _suffix, _ex) \

#define __emulate_1op_rax_rdx(ctxt, _op, _suffix, _ex)			\

	do {								\

		unsigned long _tmp;					\

		ulong *rax = &(ctxt)->regs[VCPU_REGS_RAX];		\

		ulong *rdx = &(ctxt)->regs[VCPU_REGS_RDX];		\

									\

		__asm__ __volatile__ (					\

			_PRE_EFLAGS("0", "5", "1")			\
@@ -337,31 +339,27 @@ struct gprefix { 
			"jmp 2b \n\t"					\

			".popsection \n\t"				\

			_ASM_EXTABLE(1b, 3b)				\

			: "=m" (_eflags), "=&r" (_tmp),			\

			  "+a" (_rax), "+d" (_rdx), "+qm"(_ex)		\

			: "i" (EFLAGS_MASK), "m" ((_src).val),		\

			  "a" (_rax), "d" (_rdx));			\

			: "=m" ((ctxt)->eflags), "=&r" (_tmp),		\

			  "+a" (*rax), "+d" (*rdx), "+qm"(_ex)		\

			: "i" (EFLAGS_MASK), "m" ((ctxt)->src.val),	\

			  "a" (*rax), "d" (*rdx));			\

	} while (0)



/* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */

#define emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, _ex)	\

#define emulate_1op_rax_rdx(ctxt, _op, _ex)	\

	do {								\

		switch((_src).bytes) {					\

		switch((ctxt)->src.bytes) {				\

		case 1:							\

			__emulate_1op_rax_rdx(_op, _src, _rax, _rdx,	\

					      _eflags, "b", _ex);	\

			__emulate_1op_rax_rdx(ctxt, _op, "b", _ex);	\

			break;						\

		case 2:							\

			__emulate_1op_rax_rdx(_op, _src, _rax, _rdx,	\

					      _eflags, "w", _ex);	\

			__emulate_1op_rax_rdx(ctxt, _op, "w", _ex);	\

			break;						\

		case 4:							\

			__emulate_1op_rax_rdx(_op, _src, _rax, _rdx,	\

					      _eflags, "l", _ex);	\

			__emulate_1op_rax_rdx(ctxt, _op, "l", _ex);	\

			break;						\

		case 8: ON64(						\

			__emulate_1op_rax_rdx(_op, _src, _rax, _rdx,	\

					      _eflags, "q", _ex));	\

			__emulate_1op_rax_rdx(ctxt, _op, "q", _ex));	\

			break;						\

		}							\

	} while (0)
@@ -1667,8 +1665,6 @@ static int em_grp2(struct x86_emulate_ctxt *ctxt) 


static int em_grp3(struct x86_emulate_ctxt *ctxt)

{

	unsigned long *rax = &ctxt->regs[VCPU_REGS_RAX];

	unsigned long *rdx = &ctxt->regs[VCPU_REGS_RDX];

	u8 de = 0;



	switch (ctxt->modrm_reg) {
@@ -1682,20 +1678,16 @@ static int em_grp3(struct x86_emulate_ctxt *ctxt) 
		emulate_1op(ctxt, "neg");

		break;

	case 4: /* mul */

		emulate_1op_rax_rdx("mul", ctxt->src, *rax, *rdx,

				    ctxt->eflags, de);

		emulate_1op_rax_rdx(ctxt, "mul", de);

		break;

	case 5: /* imul */

		emulate_1op_rax_rdx("imul", ctxt->src, *rax, *rdx,

				    ctxt->eflags, de);

		emulate_1op_rax_rdx(ctxt, "imul", de);

		break;

	case 6: /* div */

		emulate_1op_rax_rdx("div", ctxt->src, *rax, *rdx,

				    ctxt->eflags, de);

		emulate_1op_rax_rdx(ctxt, "div", de);

		break;

	case 7: /* idiv */

		emulate_1op_rax_rdx("idiv", ctxt->src, *rax, *rdx,

				    ctxt->eflags, de);

		emulate_1op_rax_rdx(ctxt, "idiv", de);

		break;

	default:

		return X86EMUL_UNHANDLEABLE;