Loading drivers/mmc/host/sdhci-msm.c +10 −1 Original line number Diff line number Diff line Loading @@ -146,6 +146,7 @@ #define CORE_START_CDC_TRAFFIC (1 << 6) #define CORE_PWRSAVE_DLL (1 << 3) #define CORE_FIFO_ALT_EN (1 << 10) #define CORE_CMDEN_HS400_INPUT_MASK_CNT (1 << 13) #define CORE_DDR_CAL_EN (1 << 0) Loading Loading @@ -4213,7 +4214,7 @@ static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host, * starts coming. */ if ((major == 1) && ((minor == 0x42) || (minor == 0x46) || (minor == 0x49))) (minor == 0x49) || (minor >= 0x6b))) msm_host->use_14lpp_dll = true; /* Fake 3.0V support for SDIO devices which requires such voltage */ Loading Loading @@ -4537,6 +4538,14 @@ static int sdhci_msm_probe(struct platform_device *pdev) writel_relaxed(CORE_VENDOR_SPEC_POR_VAL, host->ioaddr + msm_host_offset->CORE_VENDOR_SPEC); /* * Ensure SDHCI FIFO is enabled by disabling alternative FIFO */ writel_relaxed((readl_relaxed(host->ioaddr + msm_host_offset->CORE_VENDOR_SPEC3) & ~CORE_FIFO_ALT_EN), host->ioaddr + msm_host_offset->CORE_VENDOR_SPEC3); if (!msm_host->mci_removed) { /* Set HC_MODE_EN bit in HC_MODE register */ writel_relaxed(HC_MODE_EN, (msm_host->core_mem + CORE_HC_MODE)); Loading Loading
drivers/mmc/host/sdhci-msm.c +10 −1 Original line number Diff line number Diff line Loading @@ -146,6 +146,7 @@ #define CORE_START_CDC_TRAFFIC (1 << 6) #define CORE_PWRSAVE_DLL (1 << 3) #define CORE_FIFO_ALT_EN (1 << 10) #define CORE_CMDEN_HS400_INPUT_MASK_CNT (1 << 13) #define CORE_DDR_CAL_EN (1 << 0) Loading Loading @@ -4213,7 +4214,7 @@ static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host, * starts coming. */ if ((major == 1) && ((minor == 0x42) || (minor == 0x46) || (minor == 0x49))) (minor == 0x49) || (minor >= 0x6b))) msm_host->use_14lpp_dll = true; /* Fake 3.0V support for SDIO devices which requires such voltage */ Loading Loading @@ -4537,6 +4538,14 @@ static int sdhci_msm_probe(struct platform_device *pdev) writel_relaxed(CORE_VENDOR_SPEC_POR_VAL, host->ioaddr + msm_host_offset->CORE_VENDOR_SPEC); /* * Ensure SDHCI FIFO is enabled by disabling alternative FIFO */ writel_relaxed((readl_relaxed(host->ioaddr + msm_host_offset->CORE_VENDOR_SPEC3) & ~CORE_FIFO_ALT_EN), host->ioaddr + msm_host_offset->CORE_VENDOR_SPEC3); if (!msm_host->mci_removed) { /* Set HC_MODE_EN bit in HC_MODE register */ writel_relaxed(HC_MODE_EN, (msm_host->core_mem + CORE_HC_MODE)); Loading