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Commit e8db616a authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: clk-rcg2: Clear the HW_CLK_CONTROL bit of the RCG" into msm-4.8

parents a68670b0 ef68ec73

drivers/clk/qcom/clk-rcg2.c

+3 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013, The Linux Foundation. All rights reserved.

 * Copyright (c) 2013, 2016, The Linux Foundation. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and
@@ -42,6 +42,7 @@ 
#define CFG_MODE_SHIFT		12

#define CFG_MODE_MASK		(0x3 << CFG_MODE_SHIFT)

#define CFG_MODE_DUAL_EDGE	(0x2 << CFG_MODE_SHIFT)

#define CFG_HW_CLK_CTRL_MASK	BIT(20)



#define M_REG			0x8

#define N_REG			0xc
@@ -252,7 +253,7 @@ static int clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f) 
	}



	mask = BIT(rcg->hid_width) - 1;

	mask |= CFG_SRC_SEL_MASK | CFG_MODE_MASK;

	mask |= CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK;

	cfg = f->pre_div << CFG_SRC_DIV_SHIFT;

	cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;

	if (rcg->mnd_width && f->n && (f->m != f->n))