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Commit e7bb0e63 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: qcom: gcc-sdm845: Update the SDCC2 clock frequency on SDM845 v2 



The sdcc2_apps_clk has an updated FMAX of 201.5 MHz on SDM845 v2.
Support this from the Linux clock driver.

Change-Id: I8b56a170b708985f3d15ea9de3bfe79fbf08eb2f
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 1996ec83

drivers/clk/qcom/gcc-sdm845.c

+0 −14
Original line number Diff line number Diff line
@@ -873,17 +873,6 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { 
	{ }

};



static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src_sdm845_v2[] = {

	F(400000, P_BI_TCXO, 12, 1, 4),

	F(9600000, P_BI_TCXO, 2, 0, 0),

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0),

	F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0),

	F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),

	F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),

	{ }

};



static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {

	.cmd_rcgr = 0x1400c,

	.mnd_width = 8,
@@ -4013,9 +4002,6 @@ static void gcc_sdm845_fixup_sdm845v2(void) 
		50000000;

	gcc_qupv3_wrap1_s7_clk_src.clkr.hw.init->rate_max[VDD_CX_NOMINAL] =

		128000000;

	gcc_sdcc2_apps_clk_src.freq_tbl = ftbl_gcc_sdcc2_apps_clk_src_sdm845_v2;

	gcc_sdcc2_apps_clk_src.clkr.hw.init->rate_max[VDD_CX_LOW_L1] =

		200000000;

	gcc_ufs_card_axi_clk_src.freq_tbl =

		ftbl_gcc_ufs_card_axi_clk_src_sdm845_v2;

	gcc_ufs_card_axi_clk_src.clkr.hw.init->rate_max[VDD_CX_HIGH] =