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Commit e7aeeba6 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms/r6xx+: add query for tile config (v2) 



Userspace needs this information to access tiled
buffers via the CPU.

v2: rebased on evergreen accel changes

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 40e2a5c1

drivers/gpu/drm/radeon/evergreen.c

+1 −0
Original line number Diff line number Diff line
@@ -1132,6 +1132,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) 
								 rdev->config.evergreen.max_backends) &

								EVERGREEN_MAX_BACKENDS_MASK));



	rdev->config.evergreen.tile_config = gb_addr_config;

	WREG32(GB_BACKEND_MAP, gb_backend_map);

	WREG32(GB_ADDR_CONFIG, gb_addr_config);

	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/r600.c

+1 −1
Original line number Diff line number Diff line
@@ -1623,7 +1623,7 @@ void r600_gpu_init(struct radeon_device *rdev) 
							 r600_count_pipe_bits((cc_rb_backend_disable &

									       R6XX_MAX_BACKENDS_MASK) >> 16)),

							(cc_rb_backend_disable >> 16));



	rdev->config.r600.tile_config = tiling_config;

	tiling_config |= BACKEND_MAP(backend_map);

	WREG32(GB_TILING_CONFIG, tiling_config);

	WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);

drivers/gpu/drm/radeon/radeon.h

+3 −0
Original line number Diff line number Diff line
@@ -914,6 +914,7 @@ struct r600_asic { 
	unsigned		tiling_nbanks;

	unsigned		tiling_npipes;

	unsigned		tiling_group_size;

	unsigned		tile_config;

	struct r100_gpu_lockup	lockup;

};
@@ -938,6 +939,7 @@ struct rv770_asic { 
	unsigned		tiling_nbanks;

	unsigned		tiling_npipes;

	unsigned		tiling_group_size;

	unsigned		tile_config;

	struct r100_gpu_lockup	lockup;

};
@@ -963,6 +965,7 @@ struct evergreen_asic { 
	unsigned tiling_nbanks;

	unsigned tiling_npipes;

	unsigned tiling_group_size;

	unsigned tile_config;

};



union radeon_asic_config {

drivers/gpu/drm/radeon/radeon_drv.c

+2 −1
Original line number Diff line number Diff line
@@ -46,9 +46,10 @@ 
 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs

 * - 2.4.0 - add crtc id query

 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen

 * - 2.6.0 - add tiling config query (r6xx+)

 */

#define KMS_DRIVER_MAJOR	2

#define KMS_DRIVER_MINOR	5

#define KMS_DRIVER_MINOR	6

#define KMS_DRIVER_PATCHLEVEL	0

int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);

int radeon_driver_unload_kms(struct drm_device *dev);

drivers/gpu/drm/radeon/radeon_kms.c

+12 −0
Original line number Diff line number Diff line
@@ -147,6 +147,18 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 
	case RADEON_INFO_ACCEL_WORKING2:

		value = rdev->accel_working;

		break;

	case RADEON_INFO_TILING_CONFIG:

		if (rdev->family >= CHIP_CEDAR)

			value = rdev->config.evergreen.tile_config;

		else if (rdev->family >= CHIP_RV770)

			value = rdev->config.rv770.tile_config;

		else if (rdev->family >= CHIP_R600)

			value = rdev->config.r600.tile_config;

		else {

			DRM_DEBUG("tiling config is r6xx+ only!\n");

			return -EINVAL;

		}

		break;

	default:

		DRM_DEBUG("Invalid request %d\n", info->request);

		return -EINVAL;