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Commit e6a07569 authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: imx: let L2 initialization be a common function 



Move imx6q L2 initialization function imx6q_init_l2cache() into
system.c, and rename it imx_init_l2cache(), so that other platforms
other than imx6q can also use the function.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Acked-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
parent 8bba8303

arch/arm/mach-imx/common.h

+6 −0
Original line number Diff line number Diff line
@@ -161,6 +161,12 @@ extern int mx51_neon_fixup(void); 
static inline int mx51_neon_fixup(void) { return 0; }

#endif



#ifdef CONFIG_CACHE_L2X0

extern void imx_init_l2cache(void);

#else

static inline void imx_init_l2cache(void) {}

#endif



extern struct smp_operations imx_smp_ops;



#endif

arch/arm/mach-imx/mach-imx6q.c

+1 −36
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ 
#include <linux/micrel_phy.h>

#include <linux/mfd/syscon.h>

#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>

#include <asm/hardware/cache-l2x0.h>

#include <asm/mach/arch.h>

#include <asm/mach/map.h>

#include <asm/system_misc.h>
@@ -352,44 +351,10 @@ static void __init imx6q_map_io(void) 
	imx_scu_map_io();

}



#ifdef CONFIG_CACHE_L2X0

static void __init imx6q_init_l2cache(void)

{

	void __iomem *l2x0_base;

	struct device_node *np;

	unsigned int val;



	np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");

	if (!np)

		goto out;



	l2x0_base = of_iomap(np, 0);

	if (!l2x0_base) {

		of_node_put(np);

		goto out;

	}



	/* Configure the L2 PREFETCH and POWER registers */

	val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);

	val |= 0x70800000;

	writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);

	val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;

	writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);



	iounmap(l2x0_base);

	of_node_put(np);



out:

	l2x0_of_init(0, ~0UL);

}

#else

static inline void imx6q_init_l2cache(void) {}

#endif



static void __init imx6q_init_irq(void)

{

	imx6q_init_revision();

	imx6q_init_l2cache();

	imx_init_l2cache();

	imx_src_init();

	imx_gpc_init();

	irqchip_init();

arch/arm/mach-imx/system.c

+33 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <asm/system_misc.h>

#include <asm/proc-fns.h>

#include <asm/mach-types.h>

#include <asm/hardware/cache-l2x0.h>



#include "common.h"

#include "hardware.h"
@@ -95,3 +96,35 @@ void __init mxc_arch_reset_init_dt(void) 


	clk_prepare(wdog_clk);

}



#ifdef CONFIG_CACHE_L2X0

static void __init imx_init_l2cache(void)

{

	void __iomem *l2x0_base;

	struct device_node *np;

	unsigned int val;



	np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");

	if (!np)

		goto out;



	l2x0_base = of_iomap(np, 0);

	if (!l2x0_base) {

		of_node_put(np);

		goto out;

	}



	/* Configure the L2 PREFETCH and POWER registers */

	val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);

	val |= 0x70800000;

	writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);

	val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;

	writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);



	iounmap(l2x0_base);

	of_node_put(np);



out:

	l2x0_of_init(0, ~0UL);

}

#endif