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Commit e66f9bad authored by Padmanabhan Komanduru's avatar Padmanabhan Komanduru
Browse files

drm/msm/dp: fix programming of DP_MISC1_MISC0 register 



As part of DP ON sequence to send pixel data, the DP_MISC1_MISC0
register needs to be programmed with colorimetry data based on the
calculated values for the given DP connection cycle. Avoid reading
the existing stale values in the register and appending the new
values to it.

Change-Id: I8eb2c75c06618fd549242affa7aa9f4a91f4b76e
Signed-off-by: default avatarPadmanabhan Komanduru <pkomandu@codeaurora.org>
parent 755735e7

drivers/gpu/drm/msm/dp/dp_catalog.c

+1 −3
Original line number Diff line number Diff line
@@ -604,7 +604,7 @@ static void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog_ctrl *ctrl, 
static void dp_catalog_ctrl_config_misc(struct dp_catalog_ctrl *ctrl,

					u32 cc, u32 tb)

{

	u32 misc_val;

	u32 misc_val = cc;

	struct dp_catalog_private *catalog;

	void __iomem *base;
@@ -616,8 +616,6 @@ static void dp_catalog_ctrl_config_misc(struct dp_catalog_ctrl *ctrl, 
	dp_catalog_get_priv(ctrl);

	base = catalog->io->ctrl_io.base;



	misc_val = dp_read(base + DP_MISC1_MISC0);

	misc_val |= cc;

	misc_val |= (tb << 5);

	misc_val |= BIT(0); /* Configure clock to synchronous mode */