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Commit e5f367ae authored by Lakshmi Narayana Kalavala's avatar Lakshmi Narayana Kalavala
Browse files

ARM: dts: msm: Fix the bootup failure with icp clocks for sdm845 



ICP debug clocks assume QDSS clocks are on. If QDSS clocks
are not turned on, causes bootup failure. The debug clocks
are not necessary for icp core operation. Hence removing
the clocks from dt node.

Change-Id: I273bff14e23ba83bbd7a860ff7190bc75f12a36a
Signed-off-by: default avatarLakshmi Narayana Kalavala <lkalaval@codeaurora.org>
parent 788b90b3

arch/arm64/boot/dts/qcom/sdm845-camera.dtsi

+3 −9
Original line number Diff line number Diff line
@@ -761,24 +761,18 @@ 
			"cpas_ahb_clk",

			"camnoc_axi_clk",

			"icp_apb_clk",

			"icp_atb_clk",

			"icp_clk",

			"icp_clk_src",

			"icp_cti_clk",

			"icp_ts_clk";

			"icp_clk_src";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

				<&clock_gcc GCC_CAMERA_AXI_CLK>,

				<&clock_camcc CAM_CC_SOC_AHB_CLK>,

				<&clock_camcc CAM_CC_CPAS_AHB_CLK>,

				<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

				<&clock_camcc CAM_CC_ICP_APB_CLK>,

				<&clock_camcc CAM_CC_ICP_ATB_CLK>,

				<&clock_camcc CAM_CC_ICP_CLK>,

				<&clock_camcc CAM_CC_ICP_CLK_SRC>,

				<&clock_camcc CAM_CC_ICP_CTI_CLK>,

				<&clock_camcc CAM_CC_ICP_TS_CLK>;

				<&clock_camcc CAM_CC_ICP_CLK_SRC>;



		clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>;

		clock-rates = <0 0 0 80000000 0 0 0 600000000>;

		fw_name = "CAMERA_ICP.elf";

		status = "ok";

	};