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Commit e450813a authored by Satyajit Desai's avatar Satyajit Desai
Browse files

ARM: dts: msm: Connect CTI trig to GPIO on SDM845 



Add device tree changes to connect CTI trigout to GPIO node.

Change-Id: I09bc5832a3f2582cb2cd7ba4e2fcb96f107238a2
Signed-off-by: default avatarSatyajit Desai <sadesai@codeaurora.org>
parent 24806ed6

Documentation/devicetree/bindings/arm/coresight.txt

+14 −0
Original line number Diff line number Diff line
@@ -141,6 +141,20 @@ its hardware characteristcs. 
	* qcom,msr-fix-req: boolean, indicating if MSRs need to be programmed

	  after enabling the subunit.



* Optional properties for CTI:



	* qcom,cti-gpio-trigin: cti trigger input driven by gpio.



	* qcom,cti-gpio-trigout: cti trigger output sent to gpio.



	* pinctrl-names: names corresponding to the numbered pinctrl. The

	  allowed names are subset of the following: cti-trigin-pinctrl,

	  cti-trigout-pctrl.



	* pinctrl-<n>: list of pinctrl phandles for the different pinctrl

	  states. Refer to

	  "Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt"



* Required property for Remote ETMs:



	* qcom,inst-id: must be present. QMI instance id for remote ETMs.

arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -1341,6 +1341,10 @@ 


		clocks = <&clock_aop QDSS_CLK>;

		clock-names = "apb_pclk";



		qcom,cti-gpio-trigout = <4>;

		pinctrl-names = "cti-trigout-pctrl";

		pinctrl-0 = <&trigout_a>;

	};



	cti3: cti@6013000 {

arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -2558,6 +2558,18 @@ 
				drive-strength = <2>; /* 2 MA */

			};

		};



		trigout_a: trigout_a {

			mux {

				pins = "gpio62", "gpio51";

				function = "qdss_cti";

			};

			config {

				pins = "gpio62", "gpio51";

				drive-strength = <2>;

				bias-disable;

			};

		};

	};

};