Commit e415ad9a authored Dec 06, 2017 by Will Deacon Committed by YongQin Liu Dec 02, 2020

BACKPORT: arm64: SW PAN: Point saved ttbr0 at the zero page when switching to init_mm



update_saved_ttbr0 mandates that mm->pgd is not swapper, since swapper
contains kernel mappings and should never be installed into ttbr0. However,
this means that callers must avoid passing the init_mm to update_saved_ttbr0
which in turn can cause the saved ttbr0 value to be out-of-date in the context
of the idle thread. For example, EFI runtime services may leave the saved ttbr0
pointing at the EFI page table, and kernel threads may end up with stale
references to freed page tables.

This patch changes update_saved_ttbr0 so that the init_mm points the saved
ttbr0 value to the empty zero page, which always exists and never contains
valid translations. EFI and switch can then call into update_saved_ttbr0
unconditionally.

Test: boot successfuuly with hikey/hikey960 boards
Fixes: 5ea8fac20639d99b ("UPSTREAM: arm64: SW PAN: Update saved ttbr0 value on enter_lazy_tlb")

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Vinayak Menon <vinmenon@codeaurora.org>
Cc: <stable@vger.kernel.org>
Fixes: 39bc88e5e38e9b21 ("arm64: Disable TTBR0_EL1 during normal kernel execution")
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Vinayak Menon <vinmenon@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Change-Id: I0396c3f97e17369e323e713003f8a2efc28a85ff
Signed-off-by: Yongqin Liu <yongqin.liu@linaro.org>
(cherry picked from commit 0adbdfde8cfc9415aeed2a4955d2d17b3bd9bf13)
(cherry picked from commit 9c9f57920570e80147a818055c702474ab7fff28)

parent 3e729468

arch/arm64/include/asm/efi.h

+1 −3

Original line number	Diff line number	Diff line
		@@ -102,10 +102,8 @@ static inline void efi_set_pgd(struct mm_struct *mm)
		* Defer the switch to the current thread's TTBR0_EL1
		* until uaccess_enable(). Restore the current
		* thread's saved ttbr0 corresponding to its active_mm
		* (if different from init_mm).
		*/
		uaccess_ttbr0_disable();
		if (current->active_mm != &init_mm)
		update_saved_ttbr0(current, current->active_mm);
		}
		}

arch/arm64/include/asm/mmu_context.h

+12 −9

Original line number	Diff line number	Diff line
		@@ -161,13 +161,18 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu);
		static inline void update_saved_ttbr0(struct task_struct *tsk,
		struct mm_struct *mm)
		{
		if (system_uses_ttbr0_pan()) {
		u64 ttbr;
		BUG_ON(mm->pgd == swapper_pg_dir);

		if (!system_uses_ttbr0_pan())
		return;

		if (mm == &init_mm)
		ttbr = __pa_symbol(empty_zero_page);
		else
		ttbr = virt_to_phys(mm->pgd) \| ASID(mm) << 48;

		WRITE_ONCE(task_thread_info(tsk)->ttbr0, ttbr);
		}
		}
		#else
		static inline void update_saved_ttbr0(struct task_struct *tsk,
		struct mm_struct *mm)
		@@ -212,10 +217,8 @@ switch_mm(struct mm_struct prev, struct mm_struct next,
		* Update the saved TTBR0_EL1 of the scheduled-in task as the previous
		* value may have not been initialised yet (activate_mm caller) or the
		* ASID has changed since the last run (following the context switch
		* of another thread of the same process). Avoid setting the reserved
		* TTBR0_EL1 to swapper_pg_dir (init_mm; e.g. via idle_task_exit).
		* of another thread of the same process).
		*/
		if (next != &init_mm)
		update_saved_ttbr0(tsk, next);
		}