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Commit e309bc8c authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/sde: add new clock/bandwidth capabilities" into msm-4.9

parents f99173a5 6259a382

Documentation/devicetree/bindings/display/msm/sde.txt

+38 −0
Original line number Diff line number Diff line
@@ -274,6 +274,29 @@ Optional properties: 
				applied in scenarios where panel interface can

				be more tolerant to memory latency such as

				command mode panels.

- qcom,sde-core-ib-ff:		A string entry indicating the fudge factor for

				core ib calculation.

- qcom,sde-core-clk-ff:		A string entry indicating the fudge factor for

				core clock calculation.

- qcom,sde-comp-ratio-rt:	A string entry indicating the compression ratio

				for each supported compressed format on realtime interface.

				The string is composed of one or more of

				<fourcc code>/<vendor code>/<modifier>/<compression ratio>

				separated with spaces.

- qcom,sde-comp-ratio-nrt:	A string entry indicating the compression ratio

				for each supported compressed format on non-realtime interface.

				The string is composed of one or more of

				<fourcc code>/<vendor code>/<modifier>/<compression ratio>

				separated with spaces.

- qcom,sde-undersized-prefill-lines:	A u32 value indicates the size of undersized prefill in lines.

- qcom,sde-xtra-prefill-lines:	A u32 value indicates the extra prefill in lines.

- qcom,sde-dest-scale-prefill-lines:	A u32 value indicates the latency of destination scaler in lines.

- qcom,sde-macrotile-prefill-lines:	A u32 value indicates the latency of macrotile in lines.

- qcom,sde-yuv-nv12-prefill-lines:	A u32 value indicates the latency of yuv/nv12 in lines.

- qcom,sde-linear-prefill-lines:	A u32 value indicates the latency of linear in lines.

- qcom,sde-downscaling-prefill-lines:	A u32 value indicates the latency of downscaling in lines.

- qcom,sde-max-per-pipe-bw-kbps:	Array of u32 value indicates the max per pipe bandwidth in Kbps.

- qcom,sde-amortizable-threshold:	This value indicates the min for traffic shaping in lines.



Bus Scaling Subnodes:

- qcom,sde-reg-bus:		Property to provide Bus scaling for register access for
@@ -462,6 +485,21 @@ Example: 
    qcom,sde-max-bw-high-kbps = <9000000>;

    qcom,sde-max-bw-low-kbps = <9000000>;



    qcom,sde-core-ib-ff = "1.1";

    qcom,sde-core-clk-ff = "1.0";

    qcom,sde-comp-ratio-rt = "NV12/5/1/1.1 AB24/5/1/1.2 XB24/5/1/1.3";

    qcom,sde-comp-ratio-nrt = "NV12/5/1/1.1 AB24/5/1/1.2 XB24/5/1/1.3";

    qcom,sde-undersized-prefill-lines = <4>;

    qcom,sde-xtra-prefill-lines = <5>;

    qcom,sde-dest-scale-prefill-lines = <6>;

    qcom,sde-macrotile-prefill-lines = <7>;

    qcom,sde-yuv-nv12-prefill-lines = <8>;

    qcom,sde-linear-prefill-lines = <9>;

    qcom,sde-downscaling-prefill-lines = <10>;

    qcom,sde-max-per-pipe-bw-kbps = <2400000 2400000 2400000 2400000

        2400000 2400000 2400000 2400000>;

    qcom,sde-amortizable-threshold = <11>;



    qcom,sde-sspp-vig-blocks {

        qcom,sde-vig-csc-off = <0x320>;

        qcom,sde-vig-qseed-off = <0x200>;

drivers/gpu/drm/msm/sde/sde_core_perf.c

+2 −2
Original line number Diff line number Diff line
@@ -554,8 +554,8 @@ int sde_core_perf_init(struct sde_core_perf *perf, 


	perf->max_core_clk_rate = sde_power_clk_get_max_rate(phandle, clk_name);

	if (!perf->max_core_clk_rate) {

		SDE_ERROR("invalid max core clk rate\n");

		goto err;

		SDE_DEBUG("optional max core clk rate, use default\n");

		perf->max_core_clk_rate = SDE_PERF_DEFAULT_MAX_CORE_CLK_RATE;

	}



	return 0;

drivers/gpu/drm/msm/sde/sde_core_perf.h

+4 −0
Original line number Diff line number Diff line
@@ -21,6 +21,10 @@ 
#include "sde_hw_catalog.h"

#include "sde_power_handle.h"



#define	SDE_PERF_DEFAULT_MAX_CORE_CLK_RATE	320000000

#define	SDE_PERF_DEFAULT_MAX_BUS_AB_QUOTA	2000000000

#define	SDE_PERF_DEFAULT_MAX_BUS_IB_QUOTA	2000000000



/**

 * struct sde_core_perf_params - definition of performance parameters

 * @max_per_pipe_ib: maximum instantaneous bandwidth request

drivers/gpu/drm/msm/sde/sde_crtc.c

+33 −6
Original line number Diff line number Diff line
@@ -2709,19 +2709,19 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, 
			CRTC_PROP_CORE_CLK);

	msm_property_install_range(&sde_crtc->property_info,

			"core_ab", 0x0, 0, U64_MAX,

			SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,

			SDE_PERF_DEFAULT_MAX_BUS_AB_QUOTA,

			CRTC_PROP_CORE_AB);

	msm_property_install_range(&sde_crtc->property_info,

			"core_ib", 0x0, 0, U64_MAX,

			SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA,

			SDE_PERF_DEFAULT_MAX_BUS_IB_QUOTA,

			CRTC_PROP_CORE_IB);

	msm_property_install_range(&sde_crtc->property_info,

			"mem_ab", 0x0, 0, U64_MAX,

			SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,

			SDE_PERF_DEFAULT_MAX_BUS_AB_QUOTA,

			CRTC_PROP_MEM_AB);

	msm_property_install_range(&sde_crtc->property_info,

			"mem_ib", 0x0, 0, U64_MAX,

			SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,

			SDE_PERF_DEFAULT_MAX_BUS_IB_QUOTA,

			CRTC_PROP_MEM_IB);

	msm_property_install_range(&sde_crtc->property_info,

			"rot_prefill_bw", 0, 0, U64_MAX,
@@ -2767,13 +2767,40 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, 
	sde_kms_info_add_keyint(info, "has_src_split", catalog->has_src_split);

	if (catalog->perf.max_bw_low)

		sde_kms_info_add_keyint(info, "max_bandwidth_low",

				catalog->perf.max_bw_low);

				catalog->perf.max_bw_low * 1000LL);

	if (catalog->perf.max_bw_high)

		sde_kms_info_add_keyint(info, "max_bandwidth_high",

				catalog->perf.max_bw_high);

				catalog->perf.max_bw_high * 1000LL);

	if (sde_kms->perf.max_core_clk_rate)

		sde_kms_info_add_keyint(info, "max_mdp_clk",

				sde_kms->perf.max_core_clk_rate);

	sde_kms_info_add_keystr(info, "core_ib_ff",

			catalog->perf.core_ib_ff);

	sde_kms_info_add_keystr(info, "core_clk_ff",

			catalog->perf.core_clk_ff);

	sde_kms_info_add_keystr(info, "comp_ratio_rt",

			catalog->perf.comp_ratio_rt);

	sde_kms_info_add_keystr(info, "comp_ratio_nrt",

			catalog->perf.comp_ratio_nrt);

	sde_kms_info_add_keyint(info, "dest_scale_prefill_lines",

			catalog->perf.dest_scale_prefill_lines);

	sde_kms_info_add_keyint(info, "undersized_prefill_lines",

			catalog->perf.undersized_prefill_lines);

	sde_kms_info_add_keyint(info, "macrotile_prefill_lines",

			catalog->perf.macrotile_prefill_lines);

	sde_kms_info_add_keyint(info, "yuv_nv12_prefill_lines",

			catalog->perf.yuv_nv12_prefill_lines);

	sde_kms_info_add_keyint(info, "linear_prefill_lines",

			catalog->perf.linear_prefill_lines);

	sde_kms_info_add_keyint(info, "downscaling_prefill_lines",

			catalog->perf.downscaling_prefill_lines);

	sde_kms_info_add_keyint(info, "xtra_prefill_lines",

			catalog->perf.xtra_prefill_lines);

	sde_kms_info_add_keyint(info, "amortizable_threshold",

			catalog->perf.amortizable_threshold);

	sde_kms_info_add_keyint(info, "min_prefill_lines",

			catalog->perf.min_prefill_lines);



	msm_property_set_blob(&sde_crtc->property_info, &sde_crtc->blob_info,

			info->data, info->len, CRTC_PROP_INFO);

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+137 −2
Original line number Diff line number Diff line
@@ -93,6 +93,27 @@ 


#define DEFAULT_SBUF_HEADROOM		(20)



/*

 * Default parameter values

 */

#define DEFAULT_MAX_BW_HIGH			7000000

#define DEFAULT_MAX_BW_LOW			7000000

#define DEFAULT_UNDERSIZED_PREFILL_LINES	2

#define DEFAULT_XTRA_PREFILL_LINES		2

#define DEFAULT_DEST_SCALE_PREFILL_LINES	3

#define DEFAULT_MACROTILE_PREFILL_LINES		4

#define DEFAULT_YUV_NV12_PREFILL_LINES		8

#define DEFAULT_LINEAR_PREFILL_LINES		1

#define DEFAULT_DOWNSCALING_PREFILL_LINES	1

#define DEFAULT_CORE_IB_FF			"6.0"

#define DEFAULT_CORE_CLK_FF			"1.0"

#define DEFAULT_COMP_RATIO_RT \

		"NV12/5/1/1.23 AB24/5/1/1.23 XB24/5/1/1.23"

#define DEFAULT_COMP_RATIO_NRT \

		"NV12/5/1/1.25 AB24/5/1/1.25 XB24/5/1/1.25"

#define DEFAULT_MAX_PER_PIPE_BW			2400000

#define DEFAULT_AMORTIZABLE_THRESHOLD		25



/*************************************************************

 *  DTSI PROPERTY INDEX

 *************************************************************/
@@ -127,6 +148,18 @@ enum sde_prop { 
enum {

	PERF_MAX_BW_LOW,

	PERF_MAX_BW_HIGH,

	PERF_CORE_IB_FF,

	PERF_CORE_CLK_FF,

	PERF_COMP_RATIO_RT,

	PERF_COMP_RATIO_NRT,

	PERF_UNDERSIZED_PREFILL_LINES,

	PERF_DEST_SCALE_PREFILL_LINES,

	PERF_MACROTILE_PREFILL_LINES,

	PERF_YUV_NV12_PREFILL_LINES,

	PERF_LINEAR_PREFILL_LINES,

	PERF_DOWNSCALING_PREFILL_LINES,

	PERF_XTRA_PREFILL_LINES,

	PERF_AMORTIZABLE_THRESHOLD,

	PERF_PROP_MAX,

};
@@ -144,6 +177,7 @@ enum { 
	SSPP_RGB_BLOCKS,

	SSPP_EXCL_RECT,

	SSPP_SMART_DMA,

	SSPP_MAX_PER_PIPE_BW,

	SSPP_PROP_MAX,

};
@@ -320,6 +354,28 @@ static struct sde_prop_type sde_prop[] = { 
static struct sde_prop_type sde_perf_prop[] = {

	{PERF_MAX_BW_LOW, "qcom,sde-max-bw-low-kbps", false, PROP_TYPE_U32},

	{PERF_MAX_BW_HIGH, "qcom,sde-max-bw-high-kbps", false, PROP_TYPE_U32},

	{PERF_CORE_IB_FF, "qcom,sde-core-ib-ff", false, PROP_TYPE_STRING},

	{PERF_CORE_CLK_FF, "qcom,sde-core-clk-ff", false, PROP_TYPE_STRING},

	{PERF_COMP_RATIO_RT, "qcom,sde-comp-ratio-rt", false,

			PROP_TYPE_STRING},

	{PERF_COMP_RATIO_NRT, "qcom,sde-comp-ratio-nrt", false,

			PROP_TYPE_STRING},

	{PERF_UNDERSIZED_PREFILL_LINES, "qcom,sde-undersizedprefill-lines",

			false, PROP_TYPE_U32},

	{PERF_DEST_SCALE_PREFILL_LINES, "qcom,sde-dest-scaleprefill-lines",

			false, PROP_TYPE_U32},

	{PERF_MACROTILE_PREFILL_LINES, "qcom,sde-macrotileprefill-lines",

			false, PROP_TYPE_U32},

	{PERF_YUV_NV12_PREFILL_LINES, "qcom,sde-yuv-nv12prefill-lines",

			false, PROP_TYPE_U32},

	{PERF_LINEAR_PREFILL_LINES, "qcom,sde-linearprefill-lines",

			false, PROP_TYPE_U32},

	{PERF_DOWNSCALING_PREFILL_LINES, "qcom,sde-downscalingprefill-lines",

			false, PROP_TYPE_U32},

	{PERF_XTRA_PREFILL_LINES, "qcom,sde-xtra-prefill-lines",

			false, PROP_TYPE_U32},

	{PERF_AMORTIZABLE_THRESHOLD, "qcom,sde-amortizable-threshold",

			false, PROP_TYPE_U32},

};



static struct sde_prop_type sspp_prop[] = {
@@ -339,6 +395,8 @@ static struct sde_prop_type sspp_prop[] = { 
	{SSPP_EXCL_RECT, "qcom,sde-sspp-excl-rect", false, PROP_TYPE_U32_ARRAY},

	{SSPP_SMART_DMA, "qcom,sde-sspp-smart-dma-priority", false,

		PROP_TYPE_U32_ARRAY},

	{SSPP_MAX_PER_PIPE_BW, "qcom,sde-max-per-pipe-bw-kbps", false,

		PROP_TYPE_U32_ARRAY},

};



static struct sde_prop_type vig_prop[] = {
@@ -1078,6 +1136,12 @@ static int sde_sspp_parse_dt(struct device_node *np, 
		if (PROP_VALUE_ACCESS(prop_value, SSPP_EXCL_RECT, i) == 1)

			set_bit(SDE_SSPP_EXCL_RECT, &sspp->features);



		if (prop_exists[SSPP_MAX_PER_PIPE_BW])

			sblk->max_per_pipe_bw = PROP_VALUE_ACCESS(prop_value,

					SSPP_MAX_PER_PIPE_BW, i);

		else

			sblk->max_per_pipe_bw = DEFAULT_MAX_PER_PIPE_BW;



		for (j = 0; j < sde_cfg->mdp_count; j++) {

			sde_cfg->mdp[j].clk_ctrls[sspp->clk_ctrl].reg_off =

				PROP_BITVALUE_ACCESS(prop_value,
@@ -2260,6 +2324,7 @@ static int sde_perf_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
	int rc, len, prop_count[PERF_PROP_MAX];

	struct sde_prop_value *prop_value = NULL;

	bool prop_exists[PERF_PROP_MAX];

	const char *str = NULL;



	if (!cfg) {

		SDE_ERROR("invalid argument\n");
@@ -2285,9 +2350,72 @@ static int sde_perf_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
		goto freeprop;



	cfg->perf.max_bw_low =

			PROP_VALUE_ACCESS(prop_value, PERF_MAX_BW_LOW, 0);

			prop_exists[PERF_MAX_BW_LOW] ?

			PROP_VALUE_ACCESS(prop_value, PERF_MAX_BW_LOW, 0) :

			DEFAULT_MAX_BW_LOW;

	cfg->perf.max_bw_high =

			PROP_VALUE_ACCESS(prop_value, PERF_MAX_BW_HIGH, 0);

			prop_exists[PERF_MAX_BW_HIGH] ?

			PROP_VALUE_ACCESS(prop_value, PERF_MAX_BW_HIGH, 0) :

			DEFAULT_MAX_BW_HIGH;



	/*

	 * The following performance parameters (e.g. core_ib_ff) are

	 * mapped directly as device tree string constants.

	 */

	rc = of_property_read_string(np,

			sde_perf_prop[PERF_CORE_IB_FF].prop_name, &str);

	cfg->perf.core_ib_ff = rc ? DEFAULT_CORE_IB_FF : str;

	rc = of_property_read_string(np,

			sde_perf_prop[PERF_CORE_CLK_FF].prop_name, &str);

	cfg->perf.core_clk_ff = rc ? DEFAULT_CORE_CLK_FF : str;

	rc = of_property_read_string(np,

			sde_perf_prop[PERF_COMP_RATIO_RT].prop_name, &str);

	cfg->perf.comp_ratio_rt = rc ? DEFAULT_COMP_RATIO_RT : str;

	rc = of_property_read_string(np,

			sde_perf_prop[PERF_COMP_RATIO_NRT].prop_name, &str);

	cfg->perf.comp_ratio_nrt = rc ? DEFAULT_COMP_RATIO_NRT : str;

	rc = 0;



	cfg->perf.undersized_prefill_lines =

			prop_exists[PERF_UNDERSIZED_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_UNDERSIZED_PREFILL_LINES, 0) :

			DEFAULT_UNDERSIZED_PREFILL_LINES;

	cfg->perf.xtra_prefill_lines =

			prop_exists[PERF_XTRA_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_XTRA_PREFILL_LINES, 0) :

			DEFAULT_XTRA_PREFILL_LINES;

	cfg->perf.dest_scale_prefill_lines =

			prop_exists[PERF_DEST_SCALE_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_DEST_SCALE_PREFILL_LINES, 0) :

			DEFAULT_DEST_SCALE_PREFILL_LINES;

	cfg->perf.macrotile_prefill_lines =

			prop_exists[PERF_MACROTILE_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_MACROTILE_PREFILL_LINES, 0) :

			DEFAULT_MACROTILE_PREFILL_LINES;

	cfg->perf.yuv_nv12_prefill_lines =

			prop_exists[PERF_YUV_NV12_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_YUV_NV12_PREFILL_LINES, 0) :

			DEFAULT_YUV_NV12_PREFILL_LINES;

	cfg->perf.linear_prefill_lines =

			prop_exists[PERF_LINEAR_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_LINEAR_PREFILL_LINES, 0) :

			DEFAULT_LINEAR_PREFILL_LINES;

	cfg->perf.downscaling_prefill_lines =

			prop_exists[PERF_DOWNSCALING_PREFILL_LINES] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_DOWNSCALING_PREFILL_LINES, 0) :

			DEFAULT_DOWNSCALING_PREFILL_LINES;

	cfg->perf.amortizable_threshold =

			prop_exists[PERF_AMORTIZABLE_THRESHOLD] ?

			PROP_VALUE_ACCESS(prop_value,

					PERF_AMORTIZABLE_THRESHOLD, 0) :

			DEFAULT_AMORTIZABLE_THRESHOLD;



freeprop:

	kfree(prop_value);
@@ -2400,14 +2528,21 @@ static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) 
	case SDE_HW_VER_171:

	case SDE_HW_VER_172:

		/* update msm8996 target here */

		sde_cfg->perf.min_prefill_lines = 21;

		break;

	case SDE_HW_VER_300:

	case SDE_HW_VER_301:

		/* update msm8998 target here */

		sde_cfg->has_wb_ubwc = true;

		sde_cfg->perf.min_prefill_lines = 25;

		break;

	case SDE_HW_VER_400:

		/* update msm8998 and sdm845 target here */

		sde_cfg->has_wb_ubwc = true;

		sde_cfg->perf.min_prefill_lines = 24;

		break;

	default:

		sde_cfg->perf.min_prefill_lines = 0xffff;

		break;

	}