Loading Documentation/devicetree/bindings/regulator/gdsc-regulator.txt +5 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,11 @@ Optional properties: to enable. - qcom,reset-aon-logic: If present, the GPU DEMET cells need to be reset while enabling the GX GDSC. - vdd_parent-supply: phandle to the regulator that this GDSC gates. If present, need to vote for a minimum operational voltage (LOW_SVS) on the GDSC parent regulator prior to configuring it. The vote is removed once the GDSC FSM has latched on to the new state. - resets: reset specifier pair consisting of phandle for the reset controller and reset lines used by this controller. These can be supplied only if we support qcom,skip-logic-collapse. Loading arch/arm64/boot/dts/qcom/sdm845-interposer-pm660.dtsi +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -273,6 +273,7 @@ &gpu_cx_gdsc { /delete-property/ parent-supply; /delete-property/ vdd_parent-supply; }; &gpu_gx_gdsc { Loading arch/arm64/boot/dts/qcom/sdm845.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -4100,6 +4100,7 @@ &gpu_cx_gdsc { parent-supply = <&pm8998_s9_level>; vdd_parent-supply = <&pm8998_s9_level>; status = "ok"; }; Loading drivers/clk/qcom/gdsc-regulator.c +42 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -30,6 +30,8 @@ #include <linux/mfd/syscon.h> #include <linux/clk/qcom.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> /* GDSCR */ #define PWR_ON_MASK BIT(31) #define CLK_DIS_WAIT_MASK (0xF << 12) Loading Loading @@ -72,6 +74,7 @@ struct gdsc { struct regmap *hw_ctrl; struct regmap *sw_reset; struct clk **clocks; struct regulator *parent_regulator; struct reset_control **reset_clocks; bool toggle_mem; bool toggle_periph; Loading Loading @@ -198,6 +201,17 @@ static int gdsc_enable(struct regulator_dev *rdev) uint32_t regval, cfg_regval, hw_ctrl_regval = 0x0; int i, ret = 0; if (sc->parent_regulator) { ret = regulator_set_voltage(sc->parent_regulator, RPMH_REGULATOR_LEVEL_LOW_SVS, INT_MAX); if (ret) { dev_warn(&rdev->dev, "Unable to set the voltage on parent for %s\n", sc->rdesc.name); return ret; } } mutex_lock(&gdsc_seq_lock); if (sc->root_en || sc->force_root_en) Loading @@ -208,6 +222,8 @@ static int gdsc_enable(struct regulator_dev *rdev) dev_warn(&rdev->dev, "Invalid enable while %s is under HW control\n", sc->rdesc.name); mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage(sc->parent_regulator, 0, INT_MAX); return -EBUSY; } Loading Loading @@ -296,6 +312,11 @@ static int gdsc_enable(struct regulator_dev *rdev) regval, hw_ctrl_regval); mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage( sc->parent_regulator, 0, INT_MAX); return ret; } } else { Loading @@ -321,6 +342,10 @@ static int gdsc_enable(struct regulator_dev *rdev) } mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage( sc->parent_regulator, 0, INT_MAX); return ret; } } Loading Loading @@ -439,6 +464,9 @@ static int gdsc_disable(struct regulator_dev *rdev) mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage(sc->parent_regulator, 0, INT_MAX); return ret; } Loading Loading @@ -636,6 +664,19 @@ static int gdsc_probe(struct platform_device *pdev) if (prop_val) sc->flags |= TOGGLE_SW_COLLAPSE_IN_DISABLE; if (of_find_property(pdev->dev.of_node, "vdd_parent-supply", NULL)) { sc->parent_regulator = devm_regulator_get(&pdev->dev, "vdd_parent"); if (IS_ERR(sc->parent_regulator)) { ret = PTR_ERR(sc->parent_regulator); if (ret != -EPROBE_DEFER) dev_err(&pdev->dev, "Unable to get vdd_parent regulator, err: %d\n", ret); return ret; } } for (i = 0; i < sc->clock_count; i++) { const char *clock_name; Loading Loading
Documentation/devicetree/bindings/regulator/gdsc-regulator.txt +5 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,11 @@ Optional properties: to enable. - qcom,reset-aon-logic: If present, the GPU DEMET cells need to be reset while enabling the GX GDSC. - vdd_parent-supply: phandle to the regulator that this GDSC gates. If present, need to vote for a minimum operational voltage (LOW_SVS) on the GDSC parent regulator prior to configuring it. The vote is removed once the GDSC FSM has latched on to the new state. - resets: reset specifier pair consisting of phandle for the reset controller and reset lines used by this controller. These can be supplied only if we support qcom,skip-logic-collapse. Loading
arch/arm64/boot/dts/qcom/sdm845-interposer-pm660.dtsi +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -273,6 +273,7 @@ &gpu_cx_gdsc { /delete-property/ parent-supply; /delete-property/ vdd_parent-supply; }; &gpu_gx_gdsc { Loading
arch/arm64/boot/dts/qcom/sdm845.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -4100,6 +4100,7 @@ &gpu_cx_gdsc { parent-supply = <&pm8998_s9_level>; vdd_parent-supply = <&pm8998_s9_level>; status = "ok"; }; Loading
drivers/clk/qcom/gdsc-regulator.c +42 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -30,6 +30,8 @@ #include <linux/mfd/syscon.h> #include <linux/clk/qcom.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> /* GDSCR */ #define PWR_ON_MASK BIT(31) #define CLK_DIS_WAIT_MASK (0xF << 12) Loading Loading @@ -72,6 +74,7 @@ struct gdsc { struct regmap *hw_ctrl; struct regmap *sw_reset; struct clk **clocks; struct regulator *parent_regulator; struct reset_control **reset_clocks; bool toggle_mem; bool toggle_periph; Loading Loading @@ -198,6 +201,17 @@ static int gdsc_enable(struct regulator_dev *rdev) uint32_t regval, cfg_regval, hw_ctrl_regval = 0x0; int i, ret = 0; if (sc->parent_regulator) { ret = regulator_set_voltage(sc->parent_regulator, RPMH_REGULATOR_LEVEL_LOW_SVS, INT_MAX); if (ret) { dev_warn(&rdev->dev, "Unable to set the voltage on parent for %s\n", sc->rdesc.name); return ret; } } mutex_lock(&gdsc_seq_lock); if (sc->root_en || sc->force_root_en) Loading @@ -208,6 +222,8 @@ static int gdsc_enable(struct regulator_dev *rdev) dev_warn(&rdev->dev, "Invalid enable while %s is under HW control\n", sc->rdesc.name); mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage(sc->parent_regulator, 0, INT_MAX); return -EBUSY; } Loading Loading @@ -296,6 +312,11 @@ static int gdsc_enable(struct regulator_dev *rdev) regval, hw_ctrl_regval); mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage( sc->parent_regulator, 0, INT_MAX); return ret; } } else { Loading @@ -321,6 +342,10 @@ static int gdsc_enable(struct regulator_dev *rdev) } mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage( sc->parent_regulator, 0, INT_MAX); return ret; } } Loading Loading @@ -439,6 +464,9 @@ static int gdsc_disable(struct regulator_dev *rdev) mutex_unlock(&gdsc_seq_lock); if (sc->parent_regulator) regulator_set_voltage(sc->parent_regulator, 0, INT_MAX); return ret; } Loading Loading @@ -636,6 +664,19 @@ static int gdsc_probe(struct platform_device *pdev) if (prop_val) sc->flags |= TOGGLE_SW_COLLAPSE_IN_DISABLE; if (of_find_property(pdev->dev.of_node, "vdd_parent-supply", NULL)) { sc->parent_regulator = devm_regulator_get(&pdev->dev, "vdd_parent"); if (IS_ERR(sc->parent_regulator)) { ret = PTR_ERR(sc->parent_regulator); if (ret != -EPROBE_DEFER) dev_err(&pdev->dev, "Unable to get vdd_parent regulator, err: %d\n", ret); return ret; } } for (i = 0; i < sc->clock_count; i++) { const char *clock_name; Loading