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Commit e15dd22b authored by Veera Sundaram Sankaran's avatar Veera Sundaram Sankaran
Browse files

msm: sde: extend support for 8 level rotator QoS remapper 



QoS remapper is extended from 4 to 8 levels in sdm845.
Add support to configure 8 level QoS remapper.

Change-Id: I9e6c0733cba560cd36be3f548fedc8a35545f3ba
Signed-off-by: default avatarAlan Kwong <akwong@codeaurora.org>
Signed-off-by: default avatarVeera Sundaram Sankaran <veeras@codeaurora.org>
parent ca337de5

drivers/media/platform/msm/sde/rotator/sde_rotator_base.h

+3 −0
Original line number Diff line number Diff line
@@ -40,6 +40,9 @@ 
#define SDE_MDP_HW_REV_301	SDE_MDP_REV(3, 0, 1)	/* 8998 v1.1 */

#define SDE_MDP_HW_REV_400	SDE_MDP_REV(4, 0, 0)	/* sdm845 v1.0 */



#define SDE_MDP_VBIF_4_LEVEL_REMAPPER	4

#define SDE_MDP_VBIF_8_LEVEL_REMAPPER	8



struct sde_mult_factor {

	uint32_t numer;

	uint32_t denom;

drivers/media/platform/msm/sde/rotator/sde_rotator_hwio.h

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -65,6 +65,8 @@ 
#define MMSS_VBIF_NRT_VBIF_IN_WR_LIM_CONF2		0x00C8

#define MMSS_VBIF_NRT_VBIF_OUT_RD_LIM_CONF0		0x00D0

#define MMSS_VBIF_NRT_VBIF_OUT_WR_LIM_CONF0		0x00D4

#define MMSS_VBIF_NRT_VBIF_QOS_RP_REMAP_000		0x0550

#define MMSS_VBIF_NRT_VBIF_QOS_LVL_REMAP_000		0x0590



#define SDE_MDP_REG_TRAFFIC_SHAPER_EN			BIT(31)

#define SDE_MDP_REG_TRAFFIC_SHAPER_RD_CLIENT(num)	(0x030 + (num * 4))

drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c

+72 −34
Original line number Diff line number Diff line
@@ -740,6 +740,76 @@ static void sde_hw_rotator_unmap_vaddr(struct sde_dbg_buf *dbgbuf) 
	dbgbuf->height = 0;

}



/*

 * sde_hw_rotator_vbif_setting - helper function to set vbif QoS remapper

 * levels, enable write gather enable and avoid clk gating setting for

 * debug purpose.

 *

 * @rot: Pointer to rotator hw

 */

static void sde_hw_rotator_vbif_setting(struct sde_hw_rotator *rot)

{

	u32 i, mask, vbif_qos, reg_val = 0;

	struct sde_rot_data_type *mdata = sde_rot_get_mdata();



	/* VBIF_ROT QoS remapper setting */

	switch (mdata->npriority_lvl) {



	case SDE_MDP_VBIF_4_LEVEL_REMAPPER:

		for (i = 0; i < mdata->npriority_lvl; i++) {

			reg_val = SDE_VBIF_READ(mdata,

					MMSS_VBIF_NRT_VBIF_QOS_REMAP_00 + i*4);

			mask = 0x3 << (XIN_SSPP * 2);

			vbif_qos = mdata->vbif_nrt_qos[i];

			reg_val |= vbif_qos << (XIN_SSPP * 2);

			/* ensure write is issued after the read operation */

			mb();

			SDE_VBIF_WRITE(mdata,

					MMSS_VBIF_NRT_VBIF_QOS_REMAP_00 + i*4,

					reg_val);

		}

		break;



	case SDE_MDP_VBIF_8_LEVEL_REMAPPER:

		mask = mdata->npriority_lvl - 1;

		for (i = 0; i < mdata->npriority_lvl; i++) {

			/* RD and WR client */

			reg_val |= (mdata->vbif_nrt_qos[i] & mask)

							<< (XIN_SSPP * 4);

			reg_val |= (mdata->vbif_nrt_qos[i] & mask)

							<< (XIN_WRITEBACK * 4);



			SDE_VBIF_WRITE(mdata,

				MMSS_VBIF_NRT_VBIF_QOS_RP_REMAP_000 + i*8,

				reg_val);

			SDE_VBIF_WRITE(mdata,

				MMSS_VBIF_NRT_VBIF_QOS_LVL_REMAP_000 + i*8,

				reg_val);

		}

		break;



	default:

		SDEROT_DBG("invalid vbif remapper levels\n");

	}



	/* Enable write gather for writeback to remove write gaps, which

	 * may hang AXI/BIMC/SDE.

	 */

	SDE_VBIF_WRITE(mdata, MMSS_VBIF_NRT_VBIF_WRITE_GATHTER_EN,

			BIT(XIN_WRITEBACK));



	/*

	 * For debug purpose, disable clock gating, i.e. Clocks always on

	 */

	if (mdata->clk_always_on) {

		SDE_VBIF_WRITE(mdata, MMSS_VBIF_CLKON, 0x3);

		SDE_VBIF_WRITE(mdata, MMSS_VBIF_NRT_VBIF_CLK_FORCE_CTRL0, 0x3);

		SDE_VBIF_WRITE(mdata, MMSS_VBIF_NRT_VBIF_CLK_FORCE_CTRL1,

				0xFFFF);

		SDE_ROTREG_WRITE(rot->mdss_base, ROTTOP_CLK_CTRL, 1);

	}

}



/*

 * sde_hw_rotator_setup_timestamp_packet - setup timestamp writeback command

 * @ctx: Pointer to rotator context
@@ -2195,40 +2265,8 @@ static int sde_hw_rotator_config(struct sde_rot_hw_resource *hw, 
		SDE_ROTREG_WRITE(rot->mdss_base, ROT_WB_CDP_CNTL, 0x0);

	}



	if (mdata->npriority_lvl > 0) {

		u32 mask, reg_val, i, vbif_qos;



		for (i = 0; i < mdata->npriority_lvl; i++) {

			reg_val = SDE_VBIF_READ(mdata,

					MMSS_VBIF_NRT_VBIF_QOS_REMAP_00 + i*4);

			mask = 0x3 << (XIN_SSPP * 2);

			reg_val &= ~(mask);

			vbif_qos = mdata->vbif_nrt_qos[i];

			reg_val |= vbif_qos << (XIN_SSPP * 2);

			/* ensure write is issued after the read operation */

			mb();

			SDE_VBIF_WRITE(mdata,

					MMSS_VBIF_NRT_VBIF_QOS_REMAP_00 + i*4,

					reg_val);

		}

	}



	/* Enable write gather for writeback to remove write gaps, which

	 * may hang AXI/BIMC/SDE.

	 */

	SDE_VBIF_WRITE(mdata, MMSS_VBIF_NRT_VBIF_WRITE_GATHTER_EN,

			BIT(XIN_WRITEBACK));



	/*

	 * For debug purpose, disable clock gating, i.e. Clocks always on

	 */

	if (mdata->clk_always_on) {

		SDE_VBIF_WRITE(mdata, MMSS_VBIF_CLKON, 0x3);

		SDE_VBIF_WRITE(mdata, MMSS_VBIF_NRT_VBIF_CLK_FORCE_CTRL0, 0x3);

		SDE_VBIF_WRITE(mdata, MMSS_VBIF_NRT_VBIF_CLK_FORCE_CTRL1,

				0xFFFF);

		SDE_ROTREG_WRITE(rot->mdss_base, ROTTOP_CLK_CTRL, 1);

	}

	/* VBIF QoS and other settings */

	sde_hw_rotator_vbif_setting(rot);



	return 0;