Merge b7401f459adb6942a5c84bbfec3ba37e4a20f591 on remote branch (df6a193b) · Commits · e / devices / android_kernel_fairphone_FP3

Documentation/devicetree/bindings/altek/al6100.txt

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		Altek al6100 depth chip driver(spi/I2c)

		Description:

		The al6100 is a mini isp chip which is to process
		the dual IR raw images from IR camera sensor to be
		depth data. It has own firmware. It can connect to
		two IR camera sensors via internal mipi port(Rx0/Rx1).
		The input of this chip is the IR raw image from
		the two IR camera sensors. The Tx0/Tx1 on chip can
		connect to AP side and output depth data and IR images
		to AP.

		Required properties:
		- compatible: Should be "altek,isp"(with spi)/
		"altek,i2c_slave"(with i2c)/"altek,i2c_top"(with i2c)
		for al6100 depth chip driver
		- irq-gpios: a gpio for spi/I2c interrupt

		Optional properties:
		- vcc1-gpios: If present, specifies a gpio for power on
		al6100 depth chip
		- wp-gpios: If present, specifies a gpio for control
		eeprom write protected pin
		- reset-gpios: If present, specifies a gpio for reset
		al6100 depth chip

		Example:
		(spi)
		&spi_8 {
		mini_isp@0 {
		compatible = "altek,isp";
		reg = <0>;
		spi-max-frequency = <50000000>;
		spi-cpol;
		spi-cpha;
		vcc-supply = <&pm8953_s3>;
		reset-gpios = <&tlmm 33 0x00>;
		irq-gpios = <&tlmm 35 0x00>;
		vcc1-gpios = <&tlmm 38 0x00>;
		wp-gpios = <&tlmm 52 0x00>;
		vcc2-gpios = <&tlmm 63 0x00>;
		status = "ok";
		};
		};

		(I2c)
		i2c_slave@11 {
		compatible = "altek,i2c_slave";
		reg = <0x4b>; /* for Pure Bypass */
		reg = <0x11>;
		status = "disabled"; /* use SPI instead */
		};

		i2c_top@77 {
		compatible = "altek,i2c_top";
		reg = <0x77>;
		vcc-supply = <&pm8953_s3>;
		reset-gpios = <&tlmm 33 0x00>;
		irq-gpios = <&tlmm 35 0x00>;
		vcc1-gpios = <&tlmm 38 0x00>;
		wp-gpios = <&tlmm 52 0x00>;
		vcc2-gpios = <&tlmm 63 0x00>;
		status = "disabled"; /* use SPI instead */
		};

Documentation/devicetree/bindings/iio/adc/qcom-rradc.txt

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		@@ -45,6 +45,10 @@ Optional property:
		- qcom,pmic-revid : Phandle pointing to the revision peripheral node. Use it to query the
		PMIC fabrication ID for applying the appropriate temperature
		compensation parameters.
		- qcom,batt-id-delay-ms :
		Value type: <u32>
		Definition: Used to specify HW settling time in MS for measuring BATT_ID.
		Possible values are: 0, 1, 4, 12, 20, 40, 60, 80.
		Example:

		/* RRADC node */

Documentation/devicetree/bindings/pil/subsys-pil-tz.txt

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		@@ -70,6 +70,12 @@ Optional properties:
		- qcom,ignore-ssr-failure: Boolean. If set, SSR failures are not considered fatal.
		- qcom,mas-crypto: Reference to the bus master of crypto core.

		- qcom,sequential-fw-load: Boolean. If set, PIL loads the firmware image blobs in a
		serial fashion. Else, they are loaded in
		parallel. The property is specially useful for
		low-end (single core) systems to prevent it from
		degrading the performance.

		Example:
		qcom,venus@fdce0000 {
		compatible = "qcom,pil-tz-generic";

Documentation/devicetree/bindings/usb/dwc3.txt

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		@@ -63,6 +63,7 @@ Optional properties:
		during bus suspend.
		- snps,usb3-u1u2-disable: If present, disable U1U2 low power modes in Superspeed mode
		- snps,usb2-l1-disable: If present, disable L1 low power modes in Highspeed mode
		- normal-eps-in-gsi-mode: If present, two normal EPS (1 In, 1 Out) can be used in GSI mode

		This is usually a subnode to DWC3 glue to which it is connected.

Documentation/devicetree/bindings/vendor-prefixes.txt

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		@@ -322,3 +322,4 @@ zyxel ZyXEL Communications Corp.
		inven InvenSense, Inc.
		cy Parade.
		awinic Shanghai Awinic Technology Co., Ltd.
		altek Altek Corporation