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Commit de1325b7 authored by Sundara Vinayagam's avatar Sundara Vinayagam
Browse files

clk: msm: clock-gcc-8909: Add reset controller support in GCC driver 



Add support to register BCRs related to USB phy
as per the reset controller framework.

Change-Id: I06cdea28eaf33384a11fc5b9b8a033b962cd3c61
Signed-off-by: default avatarSundara Vinayagam <sundvi@codeaurora.org>
parent 42dd3842

drivers/clk/msm/clock-gcc-8909.c

+11 −0
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ 
#include <dt-bindings/clock/msm-clocks-8909.h>



#include "clock.h"

#include "reset.h"



enum {

	GCC_BASE,
@@ -2559,6 +2560,12 @@ static struct clk_lookup msm_clocks_lookup[] = { 
	CLK_LIST(gcc_snoc_qosgen_clk),

};



static const struct msm_reset_map gcc_8909_resets[] = {

	[GCC_USB_HS_BCR] = {0x41000},

	[GCC_USB2_HS_PHY_ONLY_BCR] = {0x41034},

	[GCC_QUSB2_PHY_BCR] = {0x4103C},

};



static int add_dev_opp(struct clk *c, struct device *dev,

				unsigned long max_rate)

{
@@ -2747,6 +2754,10 @@ static int msm_gcc_probe(struct platform_device *pdev) 
					"qcom,dev-opp-list", node);

	}



	msm_reset_controller_register(pdev, gcc_8909_resets,

					ARRAY_SIZE(gcc_8909_resets),

					virt_bases[GCC_BASE]);



	dev_info(&pdev->dev, "Registered GCC clocks\n");



	return 0;

include/dt-bindings/clock/msm-clocks-8909.h

+5 −0
Original line number Diff line number Diff line
@@ -234,4 +234,9 @@ 


#define clk_audio_lpass_mclk			0x575ec22b



/* GCC block resets */

#define GCC_USB_HS_BCR			0

#define GCC_USB2_HS_PHY_ONLY_BCR	1

#define GCC_QUSB2_PHY_BCR		2



#endif