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Commit dc24d68d authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer Committed by Ralf Baechle
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MIPS: IP28: Select correct L1_CACHE_SHIFT



IP28 has 128 byte cache lines.

Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7548/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bbc5367f
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Original line number Diff line number Diff line
@@ -546,6 +546,7 @@ config SGI_IP28
	# select SYS_HAS_EARLY_PRINTK
	select SYS_SUPPORTS_64BIT_KERNEL
	select SYS_SUPPORTS_BIG_ENDIAN
	select MIPS_L1_CACHE_SHIFT_7
      help
        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
        kernel that runs on these, say Y here.