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Commit dbcb9fe0 authored by Sridhar Gujje's avatar Sridhar Gujje
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Merge commit 'a630ce57' into msm-4.9 - PC 127



* commit 'a630ce57':
  msm: camera: reqmgr: Update frame sync logic for dual camera
  msm: camera: isp: Adds register dump to camif irq bottom half
  msm: camera: enables CDM CB for IFE
  msm: camera: ois: Populate delay in I2C register settings
  msm: camera: Dynamically find the request to be deleted
  msm: camera: isp: Multiple fixes in ISP driver
  msm: camera: Memory allocation using cma
  msm: camera: sensor: Fix sensor driver entering infinite loop
  msm: camera: icp: battery drain and hfi setup failure
  msm: camera: smmu: Add functions to map & unmap qdss memory
  msm: camera: reqmgr: Update frame sync logic for dual camera
  msm: camera: icp: Keep AHB vote at SVS

Change-Id: I845c33488170ad94a6285e0ea8a273fe635ddccd
Signed-off-by: default avatarSridhar Gujje <sgujje@codeaurora.org>
parents 3afabc36 a630ce57
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+3 −3
Original line number Diff line number Diff line
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -81,7 +81,7 @@ struct cam_cdm_acquire_data {
	enum cam_cdm_id id;
	void *userdata;
	void (*cam_cdm_callback)(uint32_t handle, void *userdata,
		enum cam_cdm_cb_status status, uint32_t cookie);
		enum cam_cdm_cb_status status, uint64_t cookie);
	uint32_t base_array_cnt;
	struct cam_soc_reg_map *base_array[CAM_SOC_MAX_BLOCK];
	struct cam_hw_version cdm_version;
@@ -128,7 +128,7 @@ struct cam_cdm_bl_cmd {
struct cam_cdm_bl_request {
	int flag;
	void *userdata;
	uint32_t cookie;
	uint64_t cookie;
	enum cam_cdm_bl_cmd_addr_type type;
	uint32_t cmd_arrary_count;
	struct cam_cdm_bl_cmd cmd[1];
+1 −0
Original line number Diff line number Diff line
@@ -143,6 +143,7 @@ static int cam_context_apply_req_to_hw(struct cam_ctx_request *req,
			ctx->dev_name, ctx->ctx_id, req->request_id);

	cfg.ctxt_to_hw_map = ctx->ctxt_to_hw_map;
	cfg.request_id = req->request_id;
	cfg.hw_update_entries = req->hw_update_entries;
	cfg.num_hw_update_entries = req->num_hw_update_entries;
	cfg.out_map_entries = req->out_map_entries;
+2 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ struct cam_hw_prepare_update_args {
 * @out_map_entries:       Out map info
 * @num_out_map_entries:   Number of out map entries
 * @priv:                  Private pointer
 * @request_id:            Request ID
 *
 */
struct cam_hw_config_args {
@@ -181,6 +182,7 @@ struct cam_hw_config_args {
	struct cam_hw_fence_map_entry  *out_map_entries;
	uint32_t                        num_out_map_entries;
	void                           *priv;
	uint64_t                        request_id;
};

/**
+2 −2
Original line number Diff line number Diff line
@@ -29,10 +29,10 @@ static uint32_t cam_fd_cdm_write_reg_val_pair(uint32_t *buffer,
}

static void cam_fd_hw_util_cdm_callback(uint32_t handle, void *userdata,
	enum cam_cdm_cb_status status, uint32_t cookie)
	enum cam_cdm_cb_status status, uint64_t cookie)
{
	trace_cam_cdm_cb("FD", status);
	CAM_DBG(CAM_FD, "CDM hdl=%x, udata=%pK, status=%d, cookie=%d",
	CAM_DBG(CAM_FD, "CDM hdl=%x, udata=%pK, status=%d, cookie=%llu",
		handle, userdata, status, cookie);
}

+4 −1
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ struct hfi_mem {
 * @msg_q: message queue hfi memory for firmware to host communication
 * @dbg_q: debug queue hfi memory for firmware debug information
 * @sec_heap: secondary heap hfi memory for firmware
 * @qdss: qdss mapped memory for fw
 * @icp_base: icp base address
 */
struct hfi_mem_info {
@@ -45,6 +46,7 @@ struct hfi_mem_info {
	struct hfi_mem dbg_q;
	struct hfi_mem sec_heap;
	struct hfi_mem shmem;
	struct hfi_mem qdss;
	void __iomem *icp_base;
};

@@ -113,9 +115,10 @@ void cam_hfi_disable_cpu(void __iomem *icp_base);
void cam_hfi_deinit(void __iomem *icp_base);
/**
 * hfi_set_debug_level() - set debug level
 * @a5_dbg_type: 1 for debug_q & 2 for qdss
 * @lvl: FW debug message level
 */
int hfi_set_debug_level(uint32_t lvl);
int hfi_set_debug_level(u64 a5_dbg_type, uint32_t lvl);

/**
 * hfi_enable_ipe_bps_pc() - Enable interframe pc
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