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Commit db8304ed authored by Kukjin Kim's avatar Kukjin Kim
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ARM: S3C24XX: make vr1000-cpld.h, vr1000-irq.h and vr1000-map.h local



The headers can be local in mach-s3c24xx/.

Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 0afdff5d
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/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
 *
 * Copyright (c) 2003 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * VR1000 - CPLD control constants
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#ifndef __ASM_ARCH_VR1000CPLD_H
#define __ASM_ARCH_VR1000CPLD_H

#define VR1000_CPLD_CTRL2_RAMWEN     (0x04)   /* SRAM Write Enable */

#endif /* __ASM_ARCH_VR1000CPLD_H */
+0 −26
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/* arch/arm/mach-s3c2410/include/mach/vr1000-irq.h
 *
 * Copyright (c) 2003-2004 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * Machine VR1000 - IRQ Number definitions
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#ifndef __ASM_ARCH_VR1000IRQ_H
#define __ASM_ARCH_VR1000IRQ_H

/* irq numbers to onboard peripherals */

#define IRQ_USBOC	     IRQ_EINT19
#define IRQ_IDE0	     IRQ_EINT16
#define IRQ_IDE1	     IRQ_EINT17
#define IRQ_VR1000_SERIAL    IRQ_EINT12
#define IRQ_VR1000_DM9000A   IRQ_EINT10
#define IRQ_VR1000_DM9000N   IRQ_EINT9
#define IRQ_SMALERT	     IRQ_EINT8

#endif /* __ASM_ARCH_VR1000IRQ_H */
+15 −18
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/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
 *
/*
 * Copyright (c) 2003-2008 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
@@ -32,27 +31,25 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/vr1000-map.h>
#include <mach/vr1000-irq.h>
#include <mach/vr1000-cpld.h>

#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <linux/platform_data/leds-s3c24xx.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/platform_data/asoc-s3c24xx_simtec.h>

#include <mach/hardware.h>
#include <mach/regs-gpio.h>

#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/platform_data/asoc-s3c24xx_simtec.h>
#include <plat/devs.h>
#include <plat/regs-serial.h>

#include "bast.h"
#include "common.h"
#include "simtec.h"
#include "vr1000.h"

/* macros for virtual address mods for the io space entries */
#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -143,7 +140,7 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
static struct plat_serial8250_port serial_platform_data[] = {
	[0] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(0),
		.irq		= IRQ_VR1000_SERIAL + 0,
		.irq		= VR1000_IRQ_SERIAL + 0,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
@@ -151,7 +148,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
	},
	[1] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(1),
		.irq		= IRQ_VR1000_SERIAL + 1,
		.irq		= VR1000_IRQ_SERIAL + 1,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
@@ -159,7 +156,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
	},
	[2] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(2),
		.irq		= IRQ_VR1000_SERIAL + 2,
		.irq		= VR1000_IRQ_SERIAL + 2,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
@@ -167,7 +164,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
	},
	[3] = {
		.mapbase	= VR1000_SERIAL_MAPBASE(3),
		.irq		= IRQ_VR1000_SERIAL + 3,
		.irq		= VR1000_IRQ_SERIAL + 3,
		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
		.iotype		= UPIO_MEM,
		.regshift	= 0,
@@ -189,14 +186,14 @@ static struct platform_device serial_device = {
static struct resource vr1000_dm9k0_resource[] = {
	[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
	[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
	[2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \
	[2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \
						| IORESOURCE_IRQ_HIGHLEVEL),
};

static struct resource vr1000_dm9k1_resource[] = {
	[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
	[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
	[2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \
	[2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \
						| IORESOURCE_IRQ_HIGHLEVEL),
};

+118 −0
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/* arch/arm/mach-s3c2410/include/mach/vr1000-map.h

/* arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h
 *
 * Copyright (c) 2003-2005 Simtec Electronics
 * Copyright (c) 2003 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * VR1000 - CPLD control constants
 * Machine VR1000 - IRQ Number definitions
 * Machine VR1000 - Memory map definitions
 *
 * This program is free software; you can redistribute it and/or modify
@@ -10,16 +13,22 @@
 * published by the Free Software Foundation.
*/

/* needs arch/map.h including with this */
#ifndef __MACH_S3C24XX_VR1000_H
#define __MACH_S3C24XX_VR1000_H __FILE__

/* ok, we've used up to 0x13000000, now we need to find space for the
 * peripherals that live in the nGCS[x] areas, which are quite numerous
 * in their space. We also have the board's CPLD to find register space
 * for.
 */
#define VR1000_CPLD_CTRL2_RAMWEN	(0x04)	/* SRAM Write Enable */

/* irq numbers to onboard peripherals */

#define VR1000_IRQ_USBOC		IRQ_EINT19
#define VR1000_IRQ_IDE0			IRQ_EINT16
#define VR1000_IRQ_IDE1			IRQ_EINT17
#define VR1000_IRQ_SERIAL		IRQ_EINT12
#define VR1000_IRQ_DM9000A		IRQ_EINT10
#define VR1000_IRQ_DM9000N		IRQ_EINT9
#define VR1000_IRQ_SMALERT		IRQ_EINT8

#ifndef __ASM_ARCH_VR1000MAP_H
#define __ASM_ARCH_VR1000MAP_H
/* map */

#define VR1000_IOADDR(x)		(S3C2410_ADDR((x) + 0x01300000))

@@ -48,7 +57,8 @@
#define VR1000_PA_PC104_IRQMASK		(S3C2410_CS5 | 0x7000000) /* 0x01900000 */
#define VR1000_VA_PC104_IRQMASK		VR1000_IOADDR(0x00600000)

/* 0xE0000000 contains the IO space that is split by speed and
/*
 * 0xE0000000 contains the IO space that is split by speed and
 * whether the access is for 8 or 16bit IO... this ensures that
 * the correct access is made
 *
@@ -105,4 +115,4 @@

#define VR1000_DM9000_CS	VR1000_VAM_CS4

#endif /* __ASM_ARCH_VR1000MAP_H */
#endif /* __MACH_S3C24XX_VR1000_H */